From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ABAFF35C6A4; Fri, 14 Aug 2026 06:31:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786689088; cv=none; b=CvuvTVni9JqPtDJ6mOL38DlIuCiURJ+jofHsYUfE+kpBZA2ojefGx1LLukoXTFCiEmKLXdlNZJs9ltQ3UaTmqdmvjHFRN0Hql0oCbWTOacQ/APGm7GjnUUidfS7+0uya1V4emonHeUMcFSj4rLsBU9dlpt/PwIF+9QwOtqe7S4w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1786689088; c=relaxed/simple; bh=tNLkukBFlZ5O9NnrddUpuWJ6amN7Aw9zKWdUWheI+sM=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=HBmPuNh27Tl1Sg4xj2xsL2wJTPnTT5ekkihdaNiWHh8M5tip3E7XURoEhI4nTDBNMZBAhUl745dm6s9IWvWyiQ66CS/OHihESZKr9/rsQPSzdb2OJ7L3jv2P5ZNl3cGlwol9fvw3uMcmiuqDS0Hvu6tpG+M4YWoxTjekbIPQH5A= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=GKNJk3Ug; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="GKNJk3Ug" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2FCC61F000E9; Fri, 14 Aug 2026 06:31:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1786689087; bh=7oNqMiAFg7mEVLeDxEPskJG0PHxI5bCBRjH5Co0WXoE=; h=Date:Subject:To:Cc:References:From:In-Reply-To; b=GKNJk3UgLSkx7VtaChHezJ/2W8t8wFefaGLeG/e8F9gbbgxmNzUA81vvoOVupx/ih MjnyjwrbZsi8Z0W3AOeBQfs8ifcIzxCzIUpB5XMYMDKM/YXvkq/aQglM8tePqb91HR e2WGU3n9XKBcjg1kamd9NfK79Nwwq5IGj9BV/mGnm70ys2Rlym6g5pl4L5oEZhqUwh +0IttwhXh/sEDYAp/LKa2/TgCkjggiT5yFXuoFuVxntVFskllxkJZUEPghmRIwVEcF QwPuTd7EAwdmMDyvNRNS4mypNU+xXoLKsnSZ68KnNTLDwjhXV1sBWXx2BIH0BRFR2k QGfz5gr/7C7ig== Message-ID: <30195e14-0dcb-476d-af0d-f85ee57e2aa5@kernel.org> Date: Fri, 14 Aug 2026 08:31:16 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/4] arm64: dts: qcom: sc7280: Add dma-coherent property into venus node To: Vishnu Reddy Cc: Bryan O'Donoghue , Vikash Garodia , Dikshita Agarwal , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stanimir Varbanov , Mansur Alisha Shaik , Bjorn Andersson , Konrad Dybcio , Abhinav Kumar , Hans Verkuil , Stefan Schmidt , Hans Verkuil , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org References: <20260801-iris-fixes-dma-pseq-fint-v1-0-aba0cb22f6ab@oss.qualcomm.com> <20260801-iris-fixes-dma-pseq-fint-v1-2-aba0cb22f6ab@oss.qualcomm.com> <20260813-frisky-augmented-crow-fd5d3d@quoll> <4b34e718-0878-25cc-a5bd-0d8858df5133@oss.qualcomm.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit On 14/08/2026 07:29, Vishnu Reddy wrote: > > On 8/13/2026 2:49 PM, Krzysztof Kozlowski wrote: >> On Sat, Aug 01, 2026 at 01:07:28PM +0530, Vishnu Reddy wrote: >>> While testing with some higher resolution clips, the venus hardware >>> triggers a fault due to wrong input data being received. Corruption >>> was also observed in the captured output when the client dumped it >>> to a file. >>> >>> On debugging, this was traced to the venus node not declaring >>> dma-coherent. As a result, DMA buffers shared between the CPU and the >>> venus video hardware/controller are not guaranteed to be I/O coherent: >>> CPU writes to an input buffer can remain in CPU caches without being >>> visible to the video hardware when it reads the same buffer, so the >>> hardware receives input data that does not match what the CPU wrote. >>> Likewise, on the capture path, data written by the video hardware to >>> the output buffer may not be visible to the CPU, so the client reads >>> stale or partial data, resulting in corruption. >>> >>> Add the dma-coherent property to the venus node so that DMA buffers >>> shared between the CPU and the video hardware and controller remain >>> coherent. >>> >>> Fixes: 37613aee2179 ("arm64: dts: qcom: sc7280: Add venus DT node") >> Really does not look like a fix. How skipping a cache sync can fix >> anything exactly? > > dma-coherent tells the kernel that this device DMA path is hardware-coherent, > so the SMMU maps its buffers as cacheable. That attribute is what causes the > coherent interconnect to snoop CPU cache lines on every VPU transaction, so > hardware keeps CPU caches and VPU-visible memory in sync — which is why the > dma-coherent property lets us skip the unnecessary cache clean/invalidate. You just repeated what I wrote. What for? > > If a device doesn't support I/O coherence, its buffers would instead be mapped > non-cacheable, no snooping would occur, and the driver would need explicit > dma_sync_*() calls at each transition. Venus on SC7280 does support I/O > coherence, so dma-coherent describes that existing hardware capability to > the DMA subsystem. How does this anyhow explain your commit msg? Are you saying driver is buggy that it misses sync calls? Best regards, Krzysztof