From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 022981E3DF7 for ; Wed, 30 Oct 2024 11:17:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730287049; cv=none; b=fLKOkcxnt21aILjVDuOzUqdBBj93XTU4auNCjMiJty4wEDu4MVnmioOxGV6rEif4GPn7vERjx6zrdYILLZRV7Z+um4EiuSYArQ8nlWwphZLuGI702HkW7tu/jcloR+D2Bv6iYykuXzMjGU6XF01wlLgrFd3mt7FhKlODRFAIn7w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730287049; c=relaxed/simple; bh=dBIiwwBcEhn14Lw69mRr5x0H14NMVKwWDSl+0W7mLh4=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=uzPSailLcxZsGCW+yV47GrG8N4/iQ3/k9nIdhguPu1wSyEvsYgtCWLMrtBCdwT3bzKgch91AnA6/vgZb3dTMixkOP+f4+hVNToUbA3g8lzo6ggjZZ3ngplNd2Bg5o+x7XXqxkjRhy4Kl9VOfuerEFhcL584EaF/aPSkDKob0pR4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nGpWdPFf; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nGpWdPFf" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7C813C4CEE3; Wed, 30 Oct 2024 11:17:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1730287046; bh=dBIiwwBcEhn14Lw69mRr5x0H14NMVKwWDSl+0W7mLh4=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=nGpWdPFfIxP5kTUlOW+O6QdsaUsaWlvDOkvM7RwRv81MXiu09IhKuCHh4EFwH1Dnt xAEazHERyuHt1C67KoNViVJBUkcx+AWLNVerexgiNjx6qjqZlauAM2XEBYhZuCzxaR HL/4BOSoYC6V1zbLCw2f3iSK31KXuWe8QT2tOifVfylvbEW5YFjL0I3WqmfI1e0xHn BLnKNGtd8242NVOquyTDW/cmZbo3kuKSvs2I7NkyB5kTPY5pVmsxuBrxNJ5t760z8E 91DK7wbN3t2/FL3t7HwD2lxBAdKmlkSiqx5BCpMF9hKJZhThwpSlD4mIY1CpEo+stT sGD3weN98kkBA== Message-ID: <3035aa2e-dbab-4224-a5db-d18e37003d5e@kernel.org> Date: Wed, 30 Oct 2024 12:17:21 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/5] mtd: rawnand: davinci: Add clock resource To: Bastien Curutchet , Santosh Shilimkar , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, Thomas Petazzoni , Herve Codina , Christopher Cordahi References: <20241030104717.88688-1-bastien.curutchet@bootlin.com> <20241030104717.88688-5-bastien.curutchet@bootlin.com> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 30/10/2024 11:47, Bastien Curutchet wrote: > NAND controller has a reference clock but the driver doesn't use it. > > Add a struct clock in the struct davinci_nand_info so it can be used > to compute timings. > > Signed-off-by: Bastien Curutchet > --- > drivers/mtd/nand/raw/davinci_nand.c | 9 +++++++++ Where are the bindings? > 1 file changed, 9 insertions(+) > > diff --git a/drivers/mtd/nand/raw/davinci_nand.c b/drivers/mtd/nand/raw/davinci_nand.c > index 3c0efbdd789e..11dc30c29957 100644 > --- a/drivers/mtd/nand/raw/davinci_nand.c > +++ b/drivers/mtd/nand/raw/davinci_nand.c > @@ -10,6 +10,7 @@ > * Dirk Behme > */ > > +#include > #include > #include > #include > @@ -117,6 +118,8 @@ struct davinci_nand_info { > uint32_t mask_cle; > > uint32_t core_chipsel; > + > + struct clk *clk; > }; > > static DEFINE_SPINLOCK(davinci_nand_lock); > @@ -822,6 +825,12 @@ static int nand_davinci_probe(struct platform_device *pdev) > return -EADDRNOTAVAIL; > } > > + info->clk = devm_clk_get(&pdev->dev, "aemif"); > + if (IS_ERR(info->clk)) { > + dev_err(&pdev->dev, "failed to get clock %ld", PTR_ERR(info->clk)); Syntax is return dev_err_probe. Best regards, Krzysztof