Re: [PATCH ath-next 1/2] wifi: ath12k: Make RXDMA buffer ring size configurable per memory profile

[Jeff Johnson <jeff.johnson@oss.qualcomm.com>]

On 10/8/2026 9:23 AM, Rameshkumar Sundaram wrote:
> On 10/7/2026 2:53 PM, Aaradhana Sahu wrote:
>> Currently, the RXDMA buffer ring size is hardcoded to 4096 and shared
>> across all memory profiles. This prevents individual profiles from tuning
>> the ring size based on their memory and performance requirements.
>>
>> Add the RXDMA buffer ring size to the memory profile configuration and
>> implement ath12k_dp_rxdma_buf_ring_size() static inline function to
>> access the configured value. This allows different memory profiles to
>> select an appropriate ring size based on available system resources.
>>
>> The function follows the pattern established in the previous patch for
> 
> Previous patch? Did you forget to add a reference?
> 
> Or maybe we can just say:
> "The function follows the existing pattern of DP ring size helpers, 
> taking struct ..."
> 
> TBH, I'd prefer to drop this paragraph entirely since it's already 
> apparent from the code.

Concur, I'll drop this paragraph when I pull into 'pending'

> 
> 
>> other DP profile parameters, taking struct ath12k_dp_profile_params
>> pointer as argument.
>>
>> Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1
>> Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3
>> Tested-on: QCC2072 hw1.0 PCI WLAN.COL.1.0.c2-00074-QCACOLSWPL_V1_TO_SILICONZ-1
>>
>> Signed-off-by: Aaradhana Sahu <aaradhana.sahu@oss.qualcomm.com>