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Thu, 9 Apr 2026 12:47:09 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , Subject: [PATCH rc v1 1/4] iommu/arm-smmu-v3: Add arm_smmu_adopt_strtab() for kdump Date: Thu, 9 Apr 2026 12:46:50 -0700 Message-ID: <30c7c51c8771722813a9cf54dae7a1b5d0aeb65d.1775763475.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF00000203:EE_|IA1PR12MB7613:EE_ X-MS-Office365-Filtering-Correlation-Id: 5ec4d40f-4795-4b99-50d8-08de9670d410 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|36860700016|1800799024|82310400026|22082099003|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: UQmwfwn4EVP8rAfyrJhGQFJlSn5r3NAVFgf/iwRJxmmL1oiirWmcHuALkUtLdjhjV+YOqkMZfnltDgGHxt5Qf+SqESVKjhKjWpMelCU7JpI5uS0WwjgthJAdIeoBRnmFwCsmixOamXf96ET9WApUzXUkpPkBsIsoDgSv8AJ6QOnt5OB9yVh880aCcviV6U8M/Dqzp2/rrdIGBY3DILn9ijN98xoVySbZx3rx36mlfxNrZ29TnE1xWYg1OHLBL3G8uN+HRayrDxXSqbXI5cyxHZl6qhvJ+bOWgOZVV3uL9FVf/lKphoVBd0pHNS00JXWtmUsh0tOtviPEprJutQVAWybA7VcYCRxwqx/NLDgQLCTP8nQU8hubzQ6lfBErPywSF6ymAoysdYJoEEvk+1lU/Qpqb6EGRmk2I8Wc+tPg+QSAIMaKI++PNSnVy070Ujjd3LqJkmgA1F4Y12q7lvZQGYuUw9AeiM0kEYF+2J7qzkPlFnUrt828zhWucgN97ty6eAsDesSWJzJCiCLcku4sUt3nD5hskao3o7MRTUAdbi6s+tD8cwWcenb9YZKVEy3ig7hRnHIQIiTm8sV20f+nsPpbRx5VjrLC9FuHK9pvxqY7jwXz5sm8rSZ59YHo92E3SMrl87w0+L9I9hWwZlYUnFJQykcD99wDxR00Se5lFCjsos+F3V7lY0G1zpukkkZIiQjyXjhMzlf9xaNXkGKOD2rGEV0BIoTS42wf+YN6Lfb1mNC7CiFjQB0TzdyAmXLEJeA+97SrL6Md5Q0BrWMfqQ== X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(36860700016)(1800799024)(82310400026)(22082099003)(18002099003)(56012099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: +viQYQPo88ZkpyXPrtmjrEiNSRji5apPXMoKNRKrnUf6/5x9fW7qmoHcBxzodNAdZ6nOrgjvHBOcmVVMJGtq/Gul1Az5aKnFfRwIn4bKLjmk3PhnYI5N06dRsyWa0Yk8CNEWhKYIg3ZvlANhF0iYpxAMwfsei4QSSX1ljKQlMg2TXUeBkY9RIvNuJ58h0sJS5R4OD6bj1OZgWKTIWpaVEOh6kydge7hzTkdVIfNjXeddNI0oy6Rn6LCPfqegl2Aqngl+o+11gqGV1/yiBPycrKzcMQcu9eAsW9Wna97YYApwk4RrWmOa1UFKEEkEZO0qSt0LXi+U+OOqqb73IeexvJh9jZp/ptb9699Wvd2VyYP0LdbSyf7+lzFrbAlKbCFZJ6/TfKcyGAYdx0Nyyn9Jq0DnybctxgPeCAloe0ohPDk//+O17cTzHs2hbWwBWhs0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Apr 2026 19:47:27.1121 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5ec4d40f-4795-4b99-50d8-08de9670d410 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF00000203.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7613 When transitioning to a kdump kernel, the primary kernel might have crashed while endpoint devices were actively bus-mastering DMA. Currently, the SMMU driver aggressively resets the hardware during probe by clearing CR0_SMMUEN and setting the Global Bypass Attribute (GBPA) to ABORT. In a kdump scenario, this aggressive reset is highly destructive: a) If GBPA is set to ABORT, in-flight DMA will be aborted, generating fatal PCIe AER or SErrors that may panic the kdump kernel b) If GBPA is set to BYPASS, in-flight DMA targeting some IOVAs will bypass the SMMU and corrupt the physical memory at those 1:1 mapped IOVAs. To safely absorb in-flight DMA, the kdump kernel must leave SMMUEN=1 intact and avoid modifying STRTAB_BASE. This allows HW to continue translating in- flight DMA using the crashed kernel's page tables until the endpoint device drivers probe and quiesce their respective hardware. However, the ARM SMMUv3 architecture specification states that updating the SMMU_STRTAB_BASE register while SMMUEN == 1 is UNPREDICTABLE or ignored. This leaves a kdump kernel no choice but to adopt the stream table from the crashed kernel. Introduce ARM_SMMU_OPT_KDUMP and arm_smmu_adopt_strtab() that does memremap on all the stream tables extracted from STRTAB_BASE and STRTAB_BASE_CFG. The option will be set in arm_smmu_device_hw_probe(). Fixes: b63b3439b856 ("iommu/arm-smmu-v3: Abort all transactions if SMMU is enabled in kdump kernel") Cc: stable@vger.kernel.org # v6.12+ Suggested-by: Jason Gunthorpe Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 99 ++++++++++++++++++++- 2 files changed, 99 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index ef42df4753ec4..74950d98ba09f 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -861,6 +861,7 @@ struct arm_smmu_device { #define ARM_SMMU_OPT_MSIPOLL (1 << 2) #define ARM_SMMU_OPT_CMDQ_FORCE_SYNC (1 << 3) #define ARM_SMMU_OPT_TEGRA241_CMDQV (1 << 4) +#define ARM_SMMU_OPT_KDUMP (1 << 5) u32 options; struct arm_smmu_cmdq cmdq; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index f6901c5437edc..8a1de3a67f78c 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -4553,11 +4553,108 @@ static int arm_smmu_init_strtab_linear(struct arm_smmu_device *smmu) return 0; } +static int arm_smmu_adopt_strtab_2lvl(struct arm_smmu_device *smmu, u32 cfg_reg, + dma_addr_t dma) +{ + u32 log2size = FIELD_GET(STRTAB_BASE_CFG_LOG2SIZE, cfg_reg); + u32 split = FIELD_GET(STRTAB_BASE_CFG_SPLIT, cfg_reg); + struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; + u32 num_l1_ents; + int i; + + if (log2size < split) { + dev_err(smmu->dev, "kdump: invalid log2size %u < split %u\n", + log2size, split); + return -EINVAL; + } + + if (split != STRTAB_SPLIT) { + dev_err(smmu->dev, + "kdump: unsupported STRTAB_SPLIT %u (expected %u)\n", + split, STRTAB_SPLIT); + return -EINVAL; + } + + num_l1_ents = 1 << (log2size - split); + cfg->l2.l1_dma = dma; + cfg->l2.num_l1_ents = num_l1_ents; + cfg->l2.l1tab = devm_memremap( + smmu->dev, dma, num_l1_ents * sizeof(struct arm_smmu_strtab_l1), + MEMREMAP_WB); + if (!cfg->l2.l1tab) + return -ENOMEM; + + cfg->l2.l2ptrs = devm_kcalloc(smmu->dev, num_l1_ents, + sizeof(*cfg->l2.l2ptrs), GFP_KERNEL); + if (!cfg->l2.l2ptrs) + return -ENOMEM; + + for (i = 0; i < num_l1_ents; i++) { + u64 l2ptr = le64_to_cpu(cfg->l2.l1tab[i].l2ptr); + u32 span = FIELD_GET(STRTAB_L1_DESC_SPAN, l2ptr); + dma_addr_t l2_dma = l2ptr & STRTAB_L1_DESC_L2PTR_MASK; + + if (span && l2_dma) { + cfg->l2.l2ptrs[i] = devm_memremap( + smmu->dev, l2_dma, + sizeof(struct arm_smmu_strtab_l2), MEMREMAP_WB); + if (!cfg->l2.l2ptrs[i]) + return -ENOMEM; + } + } + + return 0; +} + +static int arm_smmu_adopt_strtab_linear(struct arm_smmu_device *smmu, + u32 cfg_reg, dma_addr_t dma) +{ + u32 log2size = FIELD_GET(STRTAB_BASE_CFG_LOG2SIZE, cfg_reg); + struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; + + cfg->linear.ste_dma = dma; + cfg->linear.num_ents = 1 << log2size; + cfg->linear.table = devm_memremap(smmu->dev, dma, + cfg->linear.num_ents * + sizeof(struct arm_smmu_ste), + MEMREMAP_WB); + if (!cfg->linear.table) + return -ENOMEM; + return 0; +} + +static int arm_smmu_adopt_strtab(struct arm_smmu_device *smmu) +{ + u32 cfg_reg = readl_relaxed(smmu->base + ARM_SMMU_STRTAB_BASE_CFG); + u64 base_reg = readq_relaxed(smmu->base + ARM_SMMU_STRTAB_BASE); + u32 fmt = FIELD_GET(STRTAB_BASE_CFG_FMT, cfg_reg); + dma_addr_t dma = base_reg & STRTAB_BASE_ADDR_MASK; + int ret; + + dev_info(smmu->dev, "kdump: adopting crashed kernel's stream table\n"); + + if (fmt == STRTAB_BASE_CFG_FMT_2LVL) { + /* Enforce 2-level feature flag to match the adopted table */ + smmu->features |= ARM_SMMU_FEAT_2_LVL_STRTAB; + ret = arm_smmu_adopt_strtab_2lvl(smmu, cfg_reg, dma); + } else if (fmt == STRTAB_BASE_CFG_FMT_LINEAR) { + /* Force linear feature flag to match the adopted table */ + smmu->features &= ~ARM_SMMU_FEAT_2_LVL_STRTAB; + ret = arm_smmu_adopt_strtab_linear(smmu, cfg_reg, dma); + } else { + dev_err(smmu->dev, "kdump: invalid STRTAB format %u\n", fmt); + ret = -EINVAL; + } + return ret; +} + static int arm_smmu_init_strtab(struct arm_smmu_device *smmu) { int ret; - if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) + if (smmu->options & ARM_SMMU_OPT_KDUMP) + ret = arm_smmu_adopt_strtab(smmu); + else if (smmu->features & ARM_SMMU_FEAT_2_LVL_STRTAB) ret = arm_smmu_init_strtab_2lvl(smmu); else ret = arm_smmu_init_strtab_linear(smmu); -- 2.43.0