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Mon, 14 Sep 2026 21:30:42 +0000 Message-ID: <30dc55d0-511d-4f5f-92df-5dd0add354a2@intel.com> Date: Mon, 14 Sep 2026 14:30:39 -0700 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/3] x86/resctrl: Fix ABMC counter programming for extended counter ranges To: Babu Moger , , CC: , , , , , , , , , , , , References: <9e85f67add9ac84f55e4b0fced92ed8994f8419a.1788545152.git.babu.moger@amd.com> <10240e0e-6879-4378-8763-cb1a9baf1f2d@amd.com> From: Reinette Chatre Content-Language: en-US In-Reply-To: <10240e0e-6879-4378-8763-cb1a9baf1f2d@amd.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: MW4PR03CA0313.namprd03.prod.outlook.com (2603:10b6:303:dd::18) To SJ2PR11MB8370.namprd11.prod.outlook.com (2603:10b6:a03:540::20) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ2PR11MB8370:EE_|LV2PR11MB277206:EE_ X-MS-Office365-Filtering-Correlation-Id: 44ca6cb7-41b9-4c41-0a71-08df12a76dd8 X-LD-Processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|23010399003|1800799024|366016|6133799003|18002099003|22082099003|4143699003|10067099003|56012099006|11063799006; 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Update the cntr_id field handling to support the full hardware ABMC >>> counter range and ensure that counter programming does not interfere with >>> unrelated counters. >> >> Sashiko's assessment that this statement is not accurate looks correct to me. >> >> Looks like the enumeration needs a check to limit the number of supported >> counters if the hardware supports more than what can be configured? It seems >> awkward that such hardware could exist and unclear why the spec has a mismatch in > > > You're right. The spec overlooked this scenario. I've notified the concerned team. > > > Do you want me add this check? > > -               r->mon.num_mbm_cntrs = (ebx & GENMASK(15, 0)) + 1; > +               r->mon.num_mbm_cntrs = (ebx & GENMASK(12, 0)) + 1; > Yes please. > >> the number of bits here. Even if cntr_id expands further to use the remaining >> reserved bits it would still not be sufficient to configure all the numbers >> that hardware may claim to support. Are there perhaps more field width changes >> in this upcoming spec update? > > Two fields(ctrl_id and bw_src) in here are changing for this register. I dont know about other changes yet. > >> >>> >>> 2. Expand the bw_src field to 15 bits. >> >> Do the comments describing the RMID field width when reading the monitoring >> data (__cntr_id_read() and __rmid_read_phys()) need an update also? > > The RMID field width is expected to change. We can revisit this when that happens. This patch is that change, no? bw_src is expanded to 15 bits, and bw_src contains the RMID. This is the new RMID field width for monitoring configuration, after configuration the counter needs to be read for the monitoring data via MSR_IA32_QM_EVTSEL and per __cntr_id_read() the RMID field is still restricted (although not enforce by resctrl) to 12 bits: * 43:32 RMID RMID or counter ID in ABMC mode resctrl also supports switching between "default" and "mbm_event" mode and there is no support for the number of RMIDs changing between the modes ... this reading an event in "default" mode should support the same number of RMIDs as "mbm_event" mode and we see in __rmid_read_phys() (although, again not enforced) that it supports even fewer bits for RMID IA32_QM_EVTSEL.RMID (bits 41:32) are configured with valid RMID Looks like after this patch there are quite a few different field widths for RMID between what is documented, used directly, and actually enforced. >>> 3. Change "unsigned long" to u64 to fix truncation on 32-bit x86. >> >> Sashiko found that this change by itself is not sufficient to address issues >> with 32-bit. What do you think of dropping this part of the patch and instead >> adding your support to: >> >> https://lore.kernel.org/lkml/20260831174421.13921-22-tony.luck@intel.com/ ? > > Yes. I agree and support that approach. Looks like all the maintainers are inline with dropping 32. Will drop this change. If you do support that change, please consider adding a tag. Reinette