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[188.141.3.146]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-447f3dd94f1sm43381335e9.35.2025.05.20.12.23.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 20 May 2025 12:23:04 -0700 (PDT) Message-ID: <30dd203f-d7e7-420a-b310-2c36869f3aa8@linaro.org> Date: Tue, 20 May 2025 20:23:02 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/4] arm64: dts: qcom: msm8939: Add camss and cci To: vincent.knecht@mailoo.org, Robert Foss , Todor Tomov , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, =?UTF-8?Q?Andr=C3=A9_Apitzsch?= , phone-devel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht References: <20250520-camss-8x39-vbif-v1-0-a12cd6006af9@mailoo.org> <20250520-camss-8x39-vbif-v1-4-a12cd6006af9@mailoo.org> Content-Language: en-US From: Bryan O'Donoghue In-Reply-To: <20250520-camss-8x39-vbif-v1-4-a12cd6006af9@mailoo.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 20/05/2025 19:39, Vincent Knecht via B4 Relay wrote: > From: Vincent Knecht > > Add the camera subsystem and CCI used to interface with cameras on the > Snapdragon 615. > > Signed-off-by: Vincent Knecht > --- > arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi | 4 + > arch/arm64/boot/dts/qcom/msm8939.dtsi | 152 +++++++++++++++++++++++++++ > 2 files changed, 156 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi > index adb96cd8d643e5fde1ac95c0fc3c9c3c3efb07e8..659d127b1bc3570d137ca986e4eacf600c183e5e 100644 > --- a/arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi > @@ -11,6 +11,10 @@ > #include "msm8939.dtsi" > #include "pm8916.dtsi" > > +&camss { > + vdda-supply = <&pm8916_l2>; > +}; > + > &mdss_dsi0 { > vdda-supply = <&pm8916_l2>; > vddio-supply = <&pm8916_l6>; > diff --git a/arch/arm64/boot/dts/qcom/msm8939.dtsi b/arch/arm64/boot/dts/qcom/msm8939.dtsi > index 68b92fdb996c26e7a1aadedf0f52e1afca85c4ab..af4d865b6858f13559838031910bee37b58aca3c 100644 > --- a/arch/arm64/boot/dts/qcom/msm8939.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8939.dtsi > @@ -1434,6 +1434,151 @@ mdss_dsi1_phy: phy@1aa0300 { > }; > }; > > + camss: camss@1b0ac00 { isp@ > + compatible = "qcom,msm8939-camss"; > + reg = <0x01b0ac00 0x200>, <0x01b0ac00 0x0 0x200 0x0> > + <0x01b00030 0x4>, > + <0x01b0b000 0x200>, > + <0x01b00038 0x4>, > + <0x01b08000 0x100>, > + <0x01b08400 0x100>, > + <0x01b08800 0x100>, > + <0x01b0a000 0x500>, > + <0x01b00020 0x10>, > + <0x01b10000 0x1000>, > + <0x01b40000 0x200>; > + reg-names = "csiphy0", > + "csiphy0_clk_mux", > + "csiphy1", > + "csiphy1_clk_mux", > + "csid0", > + "csid1", > + "csid2", > + "ispif", > + "csi_clk_mux", > + "vfe0", > + "vfe0_vbif"; > + > + interrupts = , > + , > + , > + , > + , > + , > + ; > + interrupt-names = "csiphy0", > + "csiphy1", > + "csid0", > + "csid1", > + "csid2", > + "ispif", > + "vfe0"; > + > + power-domains = <&gcc VFE_GDSC>; > + > + clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, > + <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, > + <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, > + <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, > + <&gcc GCC_CAMSS_CSI0_AHB_CLK>, > + <&gcc GCC_CAMSS_CSI0_CLK>, > + <&gcc GCC_CAMSS_CSI0PHY_CLK>, > + <&gcc GCC_CAMSS_CSI0PIX_CLK>, > + <&gcc GCC_CAMSS_CSI0RDI_CLK>, > + <&gcc GCC_CAMSS_CSI1_AHB_CLK>, > + <&gcc GCC_CAMSS_CSI1_CLK>, > + <&gcc GCC_CAMSS_CSI1PHY_CLK>, > + <&gcc GCC_CAMSS_CSI1PIX_CLK>, > + <&gcc GCC_CAMSS_CSI1RDI_CLK>, > + <&gcc GCC_CAMSS_CSI2_AHB_CLK>, > + <&gcc GCC_CAMSS_CSI2_CLK>, > + <&gcc GCC_CAMSS_CSI2PHY_CLK>, > + <&gcc GCC_CAMSS_CSI2PIX_CLK>, > + <&gcc GCC_CAMSS_CSI2RDI_CLK>, > + <&gcc GCC_CAMSS_AHB_CLK>, > + <&gcc GCC_CAMSS_VFE0_CLK>, > + <&gcc GCC_CAMSS_CSI_VFE0_CLK>, > + <&gcc GCC_CAMSS_VFE_AHB_CLK>, > + <&gcc GCC_CAMSS_VFE_AXI_CLK>; > + clock-names = "top_ahb", > + "ispif_ahb", > + "csiphy0_timer", > + "csiphy1_timer", > + "csi0_ahb", > + "csi0", > + "csi0_phy", > + "csi0_pix", > + "csi0_rdi", > + "csi1_ahb", > + "csi1", > + "csi1_phy", > + "csi1_pix", > + "csi1_rdi", > + "csi2_ahb", > + "csi2", > + "csi2_phy", > + "csi2_pix", > + "csi2_rdi", > + "ahb", > + "vfe0", > + "csi_vfe0", > + "vfe_ahb", > + "vfe_axi"; > + > + iommus = <&apps_iommu 3>; > + > + status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + }; > + > + port@1 { > + reg = <1>; > + }; > + }; > + }; > + > + cci: cci@1b0c000 { > + compatible = "qcom,msm8916-cci", "qcom,msm8226-cci"; > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x01b0c000 0x1000>; > + interrupts = ; > + > + clocks = <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, > + <&gcc GCC_CAMSS_TOP_AHB_CLK>, > + <&gcc GCC_CAMSS_CCI_AHB_CLK>, > + <&gcc GCC_CAMSS_CCI_CLK>, > + <&gcc GCC_CAMSS_AHB_CLK>; > + clock-names = "ispif_ahb", > + "camss_top_ahb", > + "cci_ahb", > + "cci", > + "camss_ahb"; > + > + assigned-clocks = <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, > + <&gcc GCC_CAMSS_CCI_CLK>; > + assigned-clock-rates = <80000000>, > + <19200000>; > + > + pinctrl-names = "default"; > + pinctrl-0 = <&cci0_default>; > + > + status = "disabled"; > + > + cci_i2c0: i2c-bus@0 { > + reg = <0>; > + clock-frequency = <400000>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + }; > + > gpu: gpu@1c00000 { > compatible = "qcom,adreno-405.0", "qcom,adreno"; > reg = <0x01c00000 0x10000>; > @@ -1498,6 +1643,13 @@ apps_iommu: iommu@1ef0000 { > #iommu-cells = <1>; > qcom,iommu-secure-id = <17>; > > + /* vfe */ > + iommu-ctx@3000 { > + compatible = "qcom,msm-iommu-v1-sec"; > + reg = <0x3000 0x1000>; > + interrupts = ; > + }; > + > /* mdp_0: */ > iommu-ctx@4000 { > compatible = "qcom,msm-iommu-v1-ns"; >