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Miller" , "Eric Dumazet" , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , "Alexandre Torgue" , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , "Stanislav Fomichev" , Lorenzo Bianconi , Christophe Roullier , Ding Hui CC: , , , , References: <20261027150556.51209-1-thomas.bourgoin@foss.st.com> <8a1547bb-cc42-465b-8a8a-d4790cd0867f@bootlin.com> Content-Language: en-US In-Reply-To: <8a1547bb-cc42-465b-8a8a-d4790cd0867f@bootlin.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: STKCAS1NODE1.st.com (10.75.128.134) To STKDAG1NODE1.st.com (10.75.128.132) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: ZR1PEPF0000E45D:EE_|DB9PR10MB8143:EE_ X-MS-Office365-Filtering-Correlation-Id: c1990eab-59bd-4500-ef69-08df34d2a142 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|1800799024|23010399003|36860700016|82310400026|921020|4143699003|5023799004|11063799006|56012099006|261009223027099003|261022105027099003|261022075727099003|261026121527099003|261026140227099003|261021121427099003|10067099003|22082099003|18002099003|13003099007; X-Microsoft-Antispam-Message-Info: ZADUkWtd7lS67exZMtr0OqVWeVNMvBZgFu4+kjjCFUD+qPdZnUmLp1/GHLtH0q+ms+rxcZSBH/okxreT4GhbD/KEFdjXiwEg5+vymg5189U9Mu/WsCUyEF9btI5SnDgXOEnG/57k5igffWakVGle6i1tQNe1UV6tI+QfFmYCVjJq5u6IH1me3NJlBpfPlACF8czHxWWoX8HHfc2A1Ks5SG+ym0Rsaxbz9rK6sfQdX5f1V6KbfLVn3tlSdoXkDZ078RZ50Di+Q7oGISOBN/OjSPyqiClJyF1UnzGP6oAiTAdwP5dOxLPK2HY/n/wGW6+60TrU04Sd3GwwHLX1W7ppSnZeHC/Oqr9CHOipndG2rOruIRAQf58xv4b6xGiuHbxnwKvHKXfQwRS/YKGpPJ0ozUtJPm6NwWx0W0WHLhK81hqo6RL9SvLsA6jrkjrrwIIvjNDOdQUS9ow7UHnlw7vktG0TqVXiGEVnSOWphjVDa14YvZ7qeupZZu1K8n9KuYrHXwAjPaFQTm2A1zug03wfZG+09RuGOkjkEOPiwNwJiGvWphm/a+1B7LiTfPf2hbcvnMrHQZBJidwjEW+2eHWOWsya4GZXd1HIMevL1qyodT8OtDzbEJYdCKwpgydO5sIugbyzNGX4iIxCbYJWDiau3k2Uk6j12uUHah1beQrBRqWKGmVc49PRdOKv/vyh++MkxyVBGf947JGiLyMObx8HLw== X-Forefront-Antispam-Report: CIP:164.130.1.59;CTRY:IT;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:smtpO365.st.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(7416014)(376014)(1800799024)(23010399003)(36860700016)(82310400026)(921020)(4143699003)(5023799004)(11063799006)(56012099006)(261009223027099003)(261022105027099003)(261022075727099003)(261026121527099003)(261026140227099003)(261021121427099003)(10067099003)(22082099003)(18002099003)(13003099007);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 4OG3EicmgpXmIRTtcnk+/Dgxyq4kyp34y2n35XFCzGwfrGvhAvDRndYMrAItMedgoUrIvU/p7vut8eT3fCjmHTFLVgSNKdqD+MA1LwvDoIkBTq15H3GYzikS6jhdsySiT/b8B/nqC9pK+6zRbcfg5lIDNnpSPuwUSMYjYSh6FYyWFs0fbv8zrstVj4BSzKoH96s/G/PWXlbT44Fh5ULMaiFNu9e7zNlF+ge7plCkanrQktndw/0ME1f6aaRUKCfRNk8HKYaTSzbTcEbZc6hEDjLbVIwSiStRe+MIZwxPJlN38FHZ4zFaF+sgiPPYreKDUaZhGIjAF7BqoZPTCCsMZjXFU9sU0YdEzI6st/42Iz6qqEWKNLf2lDj4497tTzuetUZu0+ThSZBQDUpui7r+893qIZCJJ7L4dBgGTxetuWpMN8Go4H6lhCiVgJb1hmQo X-OriginatorOrg: foss.st.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Oct 2026 09:05:36.2930 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c1990eab-59bd-4500-ef69-08df34d2a142 X-MS-Exchange-CrossTenant-Id: 75e027c9-20d5-47d5-b82f-77d7cd041e8f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=75e027c9-20d5-47d5-b82f-77d7cd041e8f;Ip=[164.130.1.59];Helo=[smtpO365.st.com] X-MS-Exchange-CrossTenant-AuthSource: ZR1PEPF0000E45D.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR10MB8143 > Hi Thomas, > > On 10/27/26 16:05, Thomas Bourgoin wrote: >> Hello, >> >> During low power sequence on STM32MP21 we sometimes observe out of range access >> to the DDR by the GMAC ethernet. I managed to narrow down the issue to the >> resume sequence of the RX descriptors with the function >> stmmac_clear_descriptors(). >> >> On resume, stmmac_clear_descriptors() returns RX descriptors to the DMA >> without restoring their buffer addresses. On DWMAC4, the DMA will >> therefore consider a descriptor for the application as one for the DMA. >> This can lead to illegal access from the DMA anywhere. >> On STM32MP21 the DMA address bus is 40 bits, thus the extended status from the >> write-back descriptor is read as an high address by the DMA. DMA will then try >> to write in the DDR at 0x100000000 whereas on STM32MP215f-dk DDR is only 2Gb >> from 0x8000 0000 to 0xffff ffff and nothing is mapped at 0x100000000. >> All the other SoCs of the STM32MP1x or STM32MP2x are using a GMAC with a 32bits >> DMA address, so I do not have illegal attemps. >> >> To fix this, I propose to reconstruct the RX descriptors that have been used by >> the DMA but not forwarded to the NAPI function stmmac_rx() before suspend. >> >> I'm not used to this driver especially the xsk management and zero copy part. >> Since this driver is used by a lot of plateforms I'm open to all suggestions. >> >> This V1 propose to reuse stmmac_init_rx_buffers() but maybe using >> stmmac_refill() would better fit the issue. From what I read, I could not call >> stmmac_refill() as rx_q->cur_rx is only updated in stmmac_rx(), so >> stmmac_rx_dirty() returns 0. > > > Hi Maxime > Thanks for the series :) However it looks like this is already being > addressed by > Ding Hui's series (currently in V5) : > > https://lore.kernel.org/r/20261025100636.613670-1-dinghui1111@163.com > > Can you take a look and maybe provide some reviews/tested-by tags ? Thanks, for the sharing. I guess I'm not the first to have the issue :) At first glance, the v5 seems really close to the solution I proposed (update init descriptor function to factorize some code so it can be used during resume to reconstruct the descriptors that have been used by the GMAC DMA). I'll take a closer look at the series, I'll try to test on STM32MP215F-DK but I'm not sure of what I can do. Do you think, this patch is a candidate for LTS ? Regards, Thomas