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Fri, 30 Oct 2026 05:38:05 -0700 (PDT) Received: from [10.169.205.110] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6b4d7b01b53sm580389a12.15.2026.10.30.05.38.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 30 Oct 2026 05:38:03 -0700 (PDT) Content-Type: multipart/mixed; boundary="------------50GfGCps3rCUy0MrQIbZw5d3" Message-ID: <310594f7-fd4f-480c-a2f9-844e3da73b0a@oss.qualcomm.com> Date: Fri, 30 Oct 2026 13:38:00 +0100 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/6] thermal: qcom: tsens: add hardware-bin trip-point filtering To: Gaurav Kohli , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jonathan Corbet , Shuah Khan , Randy Dunlap , Amit Kucheria , Thara Gopinath , Bjorn Andersson , Konrad Dybcio , Abel Vesa Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-arm-msm@vger.kernel.org, Amit Kucheria References: <20261002-thermal_bin-v1-0-5a29be7e8ec5@oss.qualcomm.com> <20261002-thermal_bin-v1-4-5a29be7e8ec5@oss.qualcomm.com> <7cd708de-a58e-47fd-acd4-0e37be77de92@oss.qualcomm.com> <991e6b64-8741-4669-9bbf-e31eed788f42@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <991e6b64-8741-4669-9bbf-e31eed788f42@oss.qualcomm.com> X-Proofpoint-GUID: WMkkpsCmtH256bApvV6sW1rfDBLsGTSO X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDMwMDA1MCBTYWx0ZWRfX1lReFTaDsbfh VJXV9YkjMqxwSnf6e64io27GyHbQinsaj/akbw3dUaFIEpMwaj0FAg8WcSwkED0Pfp44Xd0f5qZ RfpcQGxGr2Ic1fNA4xmywtK8orPXCWGoE+ASUkfYxA5wac5PytHUz2X7k3smUBAawiLKubuEXYE R6y/X2WPyc5CF2WD82SvymWjcviPdsihmbp2LRZzn+7gmMSPgJazOkIhZjnPo57/HTDjklXFvJc mZQ76K+iEp4zs8fjjCfqVrGHQVJO17CsPOV4XeXrtE1ypgQ6tVzbr9YiqeVThm3iUpbo5jotmUh Wz5H9q63j5zrcjJNb42PNMlvgoOR9FpoIrouglBbYJQaUt+y5CWxeCGyQ5TnsqkwQUrF62ZZKVC wcLEd7D9Myz3WeyVbp3mVKmVl6Sa/mEQxMzzLzljP8EEF+972hNfhVx3K6qPNUyd9KmIu3Hy8iD H4VvQfO6mdKa3IbrIpw== X-Proofpoint-ORIG-GUID: WMkkpsCmtH256bApvV6sW1rfDBLsGTSO X-Proofpoint-Spam-Info: AW1haW4tMjYxMDMwMDA1MCBTYWx0ZWRfXzJIa41r2YZ8w ttGv5g8wyhplfSKSG0+M0QPXL7QoPkjHewyt90hy9YnYEcQ4rU9+WXCkyDkVxPPPGPAX4iSis6m 3ah7Y2SR1W1sMJhyK4MjWuUC/adAPfs= X-Authority-Analysis: v=2.4 cv=KdtHIgYD c=1 sm=1 tr=0 ts=6ae48faf cx=c_pps a=5HAIKLe1ejAbszaTRHs9Ug==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=r77TgQKjGQsHNAKrUKIA:9 a=EUspDBNiAAAA:8 a=WEAxI33MgoOtBf6C8u8A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=DWDMQnGJAQtB516vxjgA:9 a=B2y7HmGcmWMA:10 a=gYDTvv6II1OnSo0itH1n:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-30_04,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 clxscore=1015 spamscore=0 phishscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 adultscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610300050 This is a multi-part message in MIME format. --------------50GfGCps3rCUy0MrQIbZw5d3 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 10/27/26 1:59 PM, Gaurav Kohli wrote: > > > On 10/26/2026 5:21 PM, Konrad Dybcio wrote: >> On 10/23/26 12:01 PM, Gaurav Kohli wrote: >>> >>> >>> On 10/22/2026 2:39 PM, Konrad Dybcio wrote: >>>> On 10/2/26 12:46 PM, Gaurav Kohli wrote: >>>>> From: Amit Kucheria >>>>> >>>>> Some Qualcomm SoCs are binned at manufacturing time and expose the bin >>>>> in qfprom fuses.  The thermal core's supported_hw_bin mechanism filters >>>>> trip points by hardware version; wire tsens up to feed it. >>>> >>>> [...] >>>> >>>>> +    /* Hardware-bin values for thermal-hw-bin matching in DT. */ >>>>> +    const u32 hw_bin_std = 0x1; >>>>> +    const u32 hw_bin_elevated = 0x2; >>>>> + >>>>> +    /* Higher thermal profile identification for qcm6490/sc7280 bins. */ >>>>> +    const u32 tsens_chip_id0 = 0x197; >>>>> +    const u32 tsens_chip_id1 = 0x198; >>>>> +    const u32 tsens_chip_id2 = 0x20e; >>>>> +    const u32 tsens_chip_id3 = 0x20f; >>>>> +    const u8 tsens_feat_id2 = 0x2; >>>>> +    const u8 tsens_feat_id3 = 0x3; >>>>> +    const u8 tsens_feat_id4 = 0x4; >>>> >>>> Isn't that (also) exposed over SMEM? >>> >>> Thanks Konrad, for review. >>> >>> SMEM has related socinfo data, but there is no exported helper for the >>> exact fields needed here, such as feat-id, which is also used as the bin >>> value. >> >> Is that different to qcom_smem_get_feature_code()? > > Thanks for review. > I am checking internally and will update with the exact difference from > feat-id. My understanding is that qcom_smem_get_feature_code() returns > the SMEM socinfo feature_code, while this code needs the QFPROM feat-id > field from the JTAG ID fuse word. I traced down some code, only managed to find the sources for newer SoCs. The JTAG ID is present in socinfo->raw_id. I have a Kodiak (QCM6490) phone on my desk - the JTAG_ID part of the fuse reads as 0x197 and the socinfo data reads the same. I attached a patch for you. The feature ID is not exposed via SMEM to the best of my knowledge so it needs to stay as a fuse. Konrad > For this series, would prefer to keep the fuse-based path. The same > binding is also used by the generic i-temp fuse bit for Hamoa/future > targets, while the jtag-id/feat-id decoding remains only the > Kodiak/QCM6490-specific callback. Please let me know if you are fine with this approach. >> >>> This jtag-id/feat-id decoding is Kodiak/QCM6490-specific, and the >>> thermal-bin mapping needs both values. Other/future targets are expected >>> to use only the generic i-temp fuse bit, like Hamoa. >> >> So there are variants of kodiak that ""incorrectly"" set the feat_id? > > No, Kodiak is not incorrectly setting it. --------------50GfGCps3rCUy0MrQIbZw5d3 Content-Type: text/x-patch; charset=UTF-8; name="0001-soc-qcom-socinfo-Export-JTAG-ID.patch" Content-Disposition: attachment; filename="0001-soc-qcom-socinfo-Export-JTAG-ID.patch" Content-Transfer-Encoding: base64 RnJvbSBiZThiYmExZTU4ZGMxNjkwNzk1NjdhNmQ1MDZiYTBmNDAxMGIyOWU1IE1vbiBTZXAg MTcgMDA6MDA6MDAgMjAwMQpGcm9tOiBLb25yYWQgRHliY2lvIDxrb25yYWQuZHliY2lvQG9z cy5xdWFsY29tbS5jb20+CkRhdGU6IEZyaSwgMzAgT2N0IDIwMjYgMTM6MjI6NDYgKzAxMDAK U3ViamVjdDogW1BBVENIXSBzb2M6IHFjb206IHNvY2luZm86IEV4cG9ydCBKVEFHIElECgpU aGUgSlRBRyAoInJhdyIpIElEIG9mIHRoZSBTb0MgaXMgZGlmZmVyZW50IGZyb20gdGhlICJz b2NpbmZvIElEIi4gU29tZQpjb25zdW1lcnMgbmVlZCB0byBjb25zdW1lIHRoZSBmb3JtZXIu IEV4cG9ydCBpdCBpbiBkZWJ1Z2ZzIGFuZCB2aWEgYQpnZXR0ZXIuCgpTaWduZWQtb2ZmLWJ5 OiBLb25yYWQgRHliY2lvIDxrb25yYWQuZHliY2lvQG9zcy5xdWFsY29tbS5jb20+Ci0tLQog ZHJpdmVycy9zb2MvcWNvbS9zbWVtLmMgICAgICAgfCAyMiArKysrKysrKysrKysrKysrKysr KysrCiBkcml2ZXJzL3NvYy9xY29tL3NvY2luZm8uYyAgICB8ICA2ICsrKysrLQogaW5jbHVk ZS9saW51eC9zb2MvcWNvbS9zbWVtLmggfCAgMSArCiAzIGZpbGVzIGNoYW5nZWQsIDI4IGlu c2VydGlvbnMoKyksIDEgZGVsZXRpb24oLSkKCmRpZmYgLS1naXQgYS9kcml2ZXJzL3NvYy9x Y29tL3NtZW0uYyBiL2RyaXZlcnMvc29jL3Fjb20vc21lbS5jCmluZGV4IGI1ZTdiZDhjMTUx Mi4uNjY1OWYxOTk2YjI2IDEwMDY0NAotLS0gYS9kcml2ZXJzL3NvYy9xY29tL3NtZW0uYwor KysgYi9kcml2ZXJzL3NvYy9xY29tL3NtZW0uYwpAQCAtODcwLDYgKzg3MCwyOCBAQCBpbnQg cWNvbV9zbWVtX2dldF9mZWF0dXJlX2NvZGUodTMyICpjb2RlKQogfQogRVhQT1JUX1NZTUJP TF9HUEwocWNvbV9zbWVtX2dldF9mZWF0dXJlX2NvZGUpOwogCisvKioKKyAqIHFjb21fc21l bV9nZXRfanRhZ19pZCgpIC0gcmV0dXJuIHRoZSBKVEFHL3JhdyBJRAorICogQGlkOglPbiBz dWNjZXNzLCB3ZSByZXR1cm4gdGhlIFNvQyBKVEFHIGhlcmUuCisgKgorICogTG9vayB1cCB0 aGUgSlRBRyBJRCBmcm9tIEhXL1NXIGJ1aWxkIElEIGFuZCByZXR1cm4gaXQuCisgKgorICog UmV0dXJuOiAwIG9uIHN1Y2Nlc3MsIG5lZ2F0aXZlIGVycm5vIG9uIGZhaWx1cmUuCisgKi8K K2ludCBxY29tX3NtZW1fZ2V0X2p0YWdfaWQodTMyICppZCkKK3sKKwlzdHJ1Y3Qgc29jaW5m byAqaW5mbzsKKworCWluZm8gPSBxY29tX3NtZW1fZ2V0KFFDT01fU01FTV9IT1NUX0FOWSwg U01FTV9IV19TV19CVUlMRF9JRCwgTlVMTCk7CisJaWYgKElTX0VSUihpbmZvKSkKKwkJcmV0 dXJuIFBUUl9FUlIoaW5mbyk7CisKKwkqaWQgPSBfX2xlMzJfdG9fY3B1KGluZm8tPnJhd19p ZCk7CisKKwlyZXR1cm4gMDsKK30KK0VYUE9SVF9TWU1CT0xfR1BMKHFjb21fc21lbV9nZXRf anRhZ19pZCk7CisKIHN0YXRpYyBpbnQgcWNvbV9zbWVtX2dldF9zYmxfdmVyc2lvbihzdHJ1 Y3QgcWNvbV9zbWVtICpzbWVtKQogewogCXN0cnVjdCBzbWVtX2hlYWRlciAqaGVhZGVyOwpk aWZmIC0tZ2l0IGEvZHJpdmVycy9zb2MvcWNvbS9zb2NpbmZvLmMgYi9kcml2ZXJzL3NvYy9x Y29tL3NvY2luZm8uYwppbmRleCAzOGVmYzVkYjdmYTguLmFlYWM3MTZmNjM5YSAxMDA2NDQK LS0tIGEvZHJpdmVycy9zb2MvcWNvbS9zb2NpbmZvLmMKKysrIGIvZHJpdmVycy9zb2MvcWNv bS9zb2NpbmZvLmMKQEAgLTIxMSw2ICsyMTEsNyBAQCBzdHJ1Y3Qgc29jaW5mb19wYXJhbXMg ewogCXUzMiBjaGlwX2ZhbWlseTsKIAl1MzIgZm91bmRyeV9pZDsKIAl1MzIgcGxhdF92ZXI7 CisJdTMyIHJhd19pZDsKIAl1MzIgcmF3X3ZlcjsKIAl1MzIgaHdfcGxhdDsKIAl1MzIgZm10 OwpAQCAtODQ0LDggKzg0NSwxMSBAQCBzdGF0aWMgdm9pZCBzb2NpbmZvX2RlYnVnZnNfaW5p dChzdHJ1Y3QgcWNvbV9zb2NpbmZvICpxY29tX3NvY2luZm8sCiAJCQkJICAgJnFjb21fc29j aW5mby0+aW5mby5od19wbGF0KTsKIAkJZmFsbHRocm91Z2g7CiAJY2FzZSBTT0NJTkZPX1ZF UlNJT04oMCwgMik6Ci0JCXFjb21fc29jaW5mby0+aW5mby5yYXdfdmVyICA9IF9fbGUzMl90 b19jcHUoaW5mby0+cmF3X3Zlcik7CisJCXFjb21fc29jaW5mby0+aW5mby5yYXdfaWQgID0g X19sZTMyX3RvX2NwdShpbmZvLT5yYXdfaWQpOworCQlxY29tX3NvY2luZm8tPmluZm8ucmF3 X3ZlciA9IF9fbGUzMl90b19jcHUoaW5mby0+cmF3X3Zlcik7CiAKKwkJZGVidWdmc19jcmVh dGVfdTMyKCJyYXdfaWQiLCAwNDQ0LCBxY29tX3NvY2luZm8tPmRiZ19yb290LAorCQkJCSAg ICZxY29tX3NvY2luZm8tPmluZm8ucmF3X2lkKTsKIAkJZGVidWdmc19jcmVhdGVfdTMyKCJy YXdfdmVyc2lvbiIsIDA0NDQsIHFjb21fc29jaW5mby0+ZGJnX3Jvb3QsCiAJCQkJICAgJnFj b21fc29jaW5mby0+aW5mby5yYXdfdmVyKTsKIAkJZmFsbHRocm91Z2g7CmRpZmYgLS1naXQg YS9pbmNsdWRlL2xpbnV4L3NvYy9xY29tL3NtZW0uaCBiL2luY2x1ZGUvbGludXgvc29jL3Fj b20vc21lbS5oCmluZGV4IDMyNDljYmQyMDE2Yi4uNWQ3YTNjZmIyMDAwIDEwMDY0NAotLS0g YS9pbmNsdWRlL2xpbnV4L3NvYy9xY29tL3NtZW0uaAorKysgYi9pbmNsdWRlL2xpbnV4L3Nv Yy9xY29tL3NtZW0uaApAQCAtMTQsNiArMTQsNyBAQCBwaHlzX2FkZHJfdCBxY29tX3NtZW1f dmlydF90b19waHlzKHZvaWQgKnApOwogCiBpbnQgcWNvbV9zbWVtX2dldF9zb2NfaWQodTMy ICppZCk7CiBpbnQgcWNvbV9zbWVtX2dldF9mZWF0dXJlX2NvZGUodTMyICpjb2RlKTsKK2lu dCBxY29tX3NtZW1fZ2V0X2p0YWdfaWQodTMyICppZCk7CiAKIGludCBxY29tX3NtZW1fYnVz dF9od3NwaW5fbG9ja19ieV9ob3N0KHVuc2lnbmVkIGludCBob3N0KTsKIAotLSAKMi41Ni4w Cgo= --------------50GfGCps3rCUy0MrQIbZw5d3--