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Hermes SMTP Server) with ESMTPA ID 29fc1b2c3ae916a3487954e516a1409a; Sun, 08 Nov 2026 08:06:53 +0000 (UTC) Message-ID: <310bca10-e082-4d0a-a645-42fd4e58d2a6@yahoo.com> Date: Sun, 8 Nov 2026 09:06:48 +0100 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH net-next v9 02/11] net: dsa: realtek: rtl8365mb: add chip family infrastructure From: Mieczyslaw Nalewaj To: linusw@kernel.org, andrew@lunn.ch, olteanv@gmail.com, kuba@kernel.org, davem@davemloft.net, edumazet@google.com, pabeni@redhat.com, linux@armlinux.org.uk, luizluca@gmail.com, maxime.chevallier@bootlin.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, alvin.sipraga@analog.com, gusfmora@gmail.com, kuncy7@gmail.com, fabianotassotti@gmail.com, gabonpivovich@gmail.com, contact@c127.dev References: <9b73858d-fc09-4988-8bab-fd7b88db9412@yahoo.com> Content-Language: pl In-Reply-To: <9b73858d-fc09-4988-8bab-fd7b88db9412@yahoo.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Mailer: WebService/1.1.26943 mail.backend.jedi.jws.acl:role.jedi.acl.token.atz.jws.hermes.yahoo Add enum rtl8365mb_family and struct rtl8365mb_family_info, which holds the data shared by all chips of one family: the family id, the port count and the init jam table. struct rtl8365mb_chip_info now points to it through a family_info member, and all existing chips use the RTL8365MB_FAMILY_C instance. rtl8365mb_get_family_info() and rtl8365mb_is_d() are declared in a new rtl8365mb.h so that the VLAN code can use them too. Use num_ports from the family info in rtl8365mb_detect() instead of a fixed constant, so that a family with a different port count can be described by its own entry. RTL8365MB_FAMILY_D is defined here but no chip uses it yet; it is needed by the following patches, which add family D handling for chips whose register layout differs from the existing ones. No functional change. Tested-by: Gustavo Foletto Mora Tested-by: Stanislaw Pal Signed-off-by: Mieczyslaw Nalewaj --- drivers/net/dsa/realtek/rtl8365mb.h | 29 +++++++++++++ drivers/net/dsa/realtek/rtl8365mb_main.c | 52 +++++++++++++++--------- 2 files changed, 61 insertions(+), 20 deletions(-) create mode 100644 drivers/net/dsa/realtek/rtl8365mb.h diff --git a/drivers/net/dsa/realtek/rtl8365mb.h b/drivers/net/dsa/realtek/rtl8365mb.h new file mode 100644 index 0000000..daa8f0b --- /dev/null +++ b/drivers/net/dsa/realtek/rtl8365mb.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _RTL8365MB_H +#define _RTL8365MB_H + +#include "realtek.h" + +enum rtl8365mb_family { + RTL8365MB_FAMILY_C, + RTL8365MB_FAMILY_D, +}; + +struct rtl8365mb_jam_tbl_entry; + +struct rtl8365mb_family_info { + enum rtl8365mb_family family; + unsigned int num_ports; + const struct rtl8365mb_jam_tbl_entry *jam_table; + size_t jam_size; +}; + +const struct rtl8365mb_family_info * +rtl8365mb_get_family_info(struct realtek_priv *priv); + +static inline bool rtl8365mb_is_d(struct realtek_priv *priv) +{ + return rtl8365mb_get_family_info(priv)->family == RTL8365MB_FAMILY_D; +} + +#endif /* _RTL8365MB_H */ diff --git a/drivers/net/dsa/realtek/rtl8365mb_main.c b/drivers/net/dsa/realtek/rtl8365mb_main.c index da06f95..b500c84 100644 --- a/drivers/net/dsa/realtek/rtl8365mb_main.c +++ b/drivers/net/dsa/realtek/rtl8365mb_main.c @@ -110,12 +110,15 @@ #include "rtl83xx.h" #include "rtl8365mb_l2.h" #include "rtl8365mb_vlan.h" +#include "rtl8365mb.h" /* Family-specific data and limits */ #define RTL8365MB_PHYADDRMAX 7 #define RTL8365MB_NUM_PHYREGS 32 #define RTL8365MB_PHYREGMAX (RTL8365MB_NUM_PHYREGS - 1) -#define RTL8365MB_MAX_NUM_PORTS 11 +#define RTL8365MB_C_MAX_NUM_PORTS 11 +/* Highest port count of any supported chip, used for sizing */ +#define RTL8365MB_MAX_NUM_PORTS RTL8365MB_C_MAX_NUM_PORTS /* Valid for the whole family except RTL8370B, which has 4160 entries. * RTL8370B is mentioned in vendor code but it might not even belong * to the same RTL8367C family. @@ -702,14 +705,20 @@ struct rtl8365mb_extint { unsigned int supported_interfaces; }; +static const struct rtl8365mb_family_info rtl8365mb_family_c = { + .family = RTL8365MB_FAMILY_C, + .num_ports = RTL8365MB_C_MAX_NUM_PORTS, + .jam_table = rtl8365mb_init_jam_8365mb_vc, + .jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc), +}; + /** * struct rtl8365mb_chip_info - static chip-specific info * @name: human-readable chip name * @chip_id: chip identifier * @chip_ver: chip silicon revision + * @family_info: data shared by all chips of the same family * @extints: available external interfaces - * @jam_table: chip-specific initialization jam table - * @jam_size: size of the chip's jam table * * These data are specific to a given chip in the family of switches supported * by this driver. When adding support for another chip in the family, a new @@ -719,9 +728,8 @@ struct rtl8365mb_chip_info { const char *name; u32 chip_id; u32 chip_ver; + const struct rtl8365mb_family_info *family_info; const struct rtl8365mb_extint extints[RTL8365MB_MAX_NUM_EXTINTS]; - const struct rtl8365mb_jam_tbl_entry *jam_table; - size_t jam_size; }; /* Chip info for each supported switch in the family */ @@ -731,29 +739,28 @@ static const struct rtl8365mb_chip_info rtl8365mb_chip_infos[] = { .name = "RTL8365MB-VC", .chip_id = 0x6367, .chip_ver = 0x0040, + .family_info = &rtl8365mb_family_c, .extints = { { 6, 1, PHY_INTF(MII) | PHY_INTF(TMII) | PHY_INTF(RMII) | PHY_INTF(RGMII) }, }, - .jam_table = rtl8365mb_init_jam_8365mb_vc, - .jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc), }, { .name = "RTL8367S", .chip_id = 0x6367, .chip_ver = 0x00A0, + .family_info = &rtl8365mb_family_c, .extints = { { 6, 1, PHY_INTF(SGMII) | PHY_INTF(HSGMII) }, { 7, 2, PHY_INTF(MII) | PHY_INTF(TMII) | PHY_INTF(RMII) | PHY_INTF(RGMII) }, }, - .jam_table = rtl8365mb_init_jam_8365mb_vc, - .jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc), }, { .name = "RTL8367SB", .chip_id = 0x6367, .chip_ver = 0x0010, + .family_info = &rtl8365mb_family_c, .extints = { { 6, 1, PHY_INTF(MII) | PHY_INTF(TMII) | PHY_INTF(RMII) | PHY_INTF(RGMII) | @@ -761,21 +768,18 @@ static const struct rtl8365mb_chip_info rtl8365mb_chip_infos[] = { { 7, 2, PHY_INTF(MII) | PHY_INTF(TMII) | PHY_INTF(RMII) | PHY_INTF(RGMII) }, }, - .jam_table = rtl8365mb_init_jam_8365mb_vc, - .jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc), }, { .name = "RTL8367RB-VB", .chip_id = 0x6367, .chip_ver = 0x0020, + .family_info = &rtl8365mb_family_c, .extints = { { 6, 1, PHY_INTF(MII) | PHY_INTF(TMII) | PHY_INTF(RMII) | PHY_INTF(RGMII) }, { 7, 2, PHY_INTF(MII) | PHY_INTF(TMII) | PHY_INTF(RMII) | PHY_INTF(RGMII) }, }, - .jam_table = rtl8365mb_init_jam_8365mb_vc, - .jam_size = ARRAY_SIZE(rtl8365mb_init_jam_8365mb_vc), }, }; @@ -874,6 +878,14 @@ struct rtl8365mb { #define pcs_to_rtl8365mb(_pcs) container_of((_pcs), struct rtl8365mb, pcs) +const struct rtl8365mb_family_info * +rtl8365mb_get_family_info(struct realtek_priv *priv) +{ + struct rtl8365mb *mb = priv->chip_data; + + return mb->chip_info->family_info; +} + static int rtl8365mb_phy_poll_busy(struct realtek_priv *priv) { u32 val; @@ -3036,17 +3048,17 @@ static int rtl8365mb_change_tag_protocol(struct dsa_switch *ds, static int rtl8365mb_switch_init(struct realtek_priv *priv) { struct rtl8365mb *mb = priv->chip_data; - const struct rtl8365mb_chip_info *ci; + const struct rtl8365mb_family_info *fi; int ret; int i; - ci = mb->chip_info; + fi = mb->chip_info->family_info; /* Do any chip-specific init jam before getting to the common stuff */ - if (ci->jam_table) { - for (i = 0; i < ci->jam_size; i++) { - ret = regmap_write(priv->map, ci->jam_table[i].reg, - ci->jam_table[i].val); + if (fi->jam_table) { + for (i = 0; i < fi->jam_size; i++) { + ret = regmap_write(priv->map, fi->jam_table[i].reg, + fi->jam_table[i].val); if (ret) return ret; } @@ -3349,7 +3361,7 @@ static int rtl8365mb_detect(struct realtek_priv *priv) dev_info(priv->dev, "found an %s switch\n", mb->chip_info->name); - priv->num_ports = RTL8365MB_MAX_NUM_PORTS; + priv->num_ports = mb->chip_info->family_info->num_ports; mb->priv = priv; mb->cpu.trap_port = RTL8365MB_MAX_NUM_PORTS; mb->cpu.insert = RTL8365MB_CPU_INSERT_TO_ALL; -- 2.53.0