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Wed, 06 Aug 2025 03:39:58 -0700 (PDT) Message-ID: <3134db13-5fd6-4cf9-a8d7-97a5a39971d5@tuxon.dev> Date: Wed, 6 Aug 2025 13:39:57 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/4] clk: renesas: r9a07g043: Add MSTOP for RZ/G2UL To: Geert Uytterhoeven Cc: mturquette@baylibre.com, sboyd@kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Claudiu Beznea References: <20250806092129.621194-1-claudiu.beznea.uj@bp.renesas.com> <20250806092129.621194-4-claudiu.beznea.uj@bp.renesas.com> From: Claudiu Beznea Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi, Geert, On 06.08.2025 12:48, Geert Uytterhoeven wrote: > Hi Claudiu, > > Thanks for the update! > > On Wed, 6 Aug 2025 at 11:21, Claudiu wrote: >> From: Claudiu Beznea >> >> Add MSTOP configuration for all the module clocks on the RZ/G2UL >> based SoCs (RZ/G2UL, RZ/V2L, RZ/Five). > RZ/V2L is handled by r9a07g044-cpg.c, so I will move this comment > to [PATCH v2 2/4] while applying. Thank you!