From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F37F1C433EF for ; Thu, 31 Mar 2022 09:29:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234060AbiCaJa4 (ORCPT ); Thu, 31 Mar 2022 05:30:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41572 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234103AbiCaJak (ORCPT ); Thu, 31 Mar 2022 05:30:40 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 79F18204A85 for ; Thu, 31 Mar 2022 02:28:14 -0700 (PDT) Received: from gallifrey.ext.pengutronix.de ([2001:67c:670:201:5054:ff:fe8d:eefb] helo=[IPv6:::1]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1nZr67-00066h-2h; Thu, 31 Mar 2022 11:28:07 +0200 Message-ID: <319e976acb0a686e596b88520dbcda59c78afe9e.camel@pengutronix.de> Subject: Re: [PATCH] soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active From: Lucas Stach To: Adam Ford , linux-arm-kernel@lists.infradead.org Cc: tharvey@gateworks.com, aford@beaconembedded.com, Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Peng Fan , linux-kernel@vger.kernel.org Date: Thu, 31 Mar 2022 11:28:05 +0200 In-Reply-To: <20211120193916.1309236-1-aford173@gmail.com> References: <20211120193916.1309236-1-aford173@gmail.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.40.4 (3.40.4-1.fc34) MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 2001:67c:670:201:5054:ff:fe8d:eefb X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Adam, hi Shawn, Am Samstag, dem 20.11.2021 um 13:39 -0600 schrieb Adam Ford: > Enable the vpu-h1 clock when the domain is active because reading > or writing to the VPU-H1 IP block cause the system to hang. > > Fixes: 656ade7aa42a ("soc: imx: gpcv2: keep i.MX8M* bus clocks enabled") > Signed-off-by: Adam Ford > > diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c > index b8d52d8d29db..7b6dfa33dcb9 100644 > --- a/drivers/soc/imx/gpcv2.c > +++ b/drivers/soc/imx/gpcv2.c > @@ -734,6 +734,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = { > .map = IMX8MM_VPUH1_A53_DOMAIN, > }, > .pgc = BIT(IMX8MM_PGC_VPUH1), > + .keep_clocks = true, > }, > I missed this patch and just stumbled across it when looking at the git history. I don't think this patch is correct. The H1 GPC domain does not even have clocks assigned in the DT, so there is nothing to keep active. Also H1 is not a MIX domain, so it should not keep any bus clocks active, that is the job of the VPUMIX domain. While this patch is a no-op, as far as I can see, it still seems wrong and I think it should be reverted. Regards, Lucas