From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from szxga04-in.huawei.com (szxga04-in.huawei.com [45.249.212.190]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 23D73221572 for ; Fri, 1 Aug 2025 09:21:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.249.212.190 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754040085; cv=none; b=QySmynN/TzgC9DXpjHQULYUbFLxatLiQqkFH0Cql1iWQTMHH+QsUdyUcPYnw+XdeC5gori4Rgf9yWRyoWMMFxQvUisnAUhmdJcV/zKpYZ8hcb7rKFnDYXpalAI0wg1Vg8gufuukatH67XaPXotMIVcr/EHTGYY5CbS52GJzZWRY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1754040085; c=relaxed/simple; bh=du22HW51W7TM7URApKT2N9pcyVmjYUuUAreMpBjTbQU=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=kybciAyVT4p6TRHvFaJilkr2l3nixFEFrVM+RFEVDim2owK3ZQDc8yt8zLKW+6sJ7Hyrqt/JSb13mGqkO+UuTgMyyaoG50FzD9dm1Jhks9NviDeA03R+MwgcsK9A/zXzJB8aq3pXEm0VoD3WU2MpimsEKpsZywbF9Zg5M1gL6/Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; arc=none smtp.client-ip=45.249.212.190 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Received: from mail.maildlp.com (unknown [172.19.88.214]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4btgPB2h7Tz2RW1l; Fri, 1 Aug 2025 17:18:54 +0800 (CST) Received: from dggemv705-chm.china.huawei.com (unknown [10.3.19.32]) by mail.maildlp.com (Postfix) with ESMTPS id 379AB1A0171; Fri, 1 Aug 2025 17:21:19 +0800 (CST) Received: from kwepemq100007.china.huawei.com (7.202.195.175) by dggemv705-chm.china.huawei.com (10.3.19.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Fri, 1 Aug 2025 17:21:18 +0800 Received: from [10.159.166.136] (10.159.166.136) by kwepemq100007.china.huawei.com (7.202.195.175) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Fri, 1 Aug 2025 17:21:18 +0800 Message-ID: <31aaa735-9c46-4507-9289-171a5d80a149@huawei.com> Date: Fri, 1 Aug 2025 17:21:17 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 drm-dp 02/11] drm/hisilicon/hibmc: fix dp probabilistical detect errors after HPD irq To: Dmitry Baryshkov CC: , , , , , , , , , , , , , , , , , References: <20250718065125.2892404-1-shiyongbang@huawei.com> <20250718065125.2892404-3-shiyongbang@huawei.com> From: Yongbang Shi In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: kwepems200002.china.huawei.com (7.221.188.68) To kwepemq100007.china.huawei.com (7.202.195.175) > On Fri, Jul 18, 2025 at 02:51:16PM +0800, Yongbang Shi wrote: >> From: Baihan Li >> >> The debouncing when HPD pulled out still remains sometimes, 200ms still can >> not ensure helper_detect() is correct. Add hibmc_dp_detect_link() in >> detect_ctx(), which is to try dp link training. > I'm not sure if I follow the commit message. Anyway, link training > should be a part of atomic_(pre)_enable, not a detect_ctx. Okay, I will change it. thanks for your advice! The problem is that when I unpluged the connector, sometimes the drm_connector_helper_detect_from_ddc() return connected in dp's detect_ctx(). >> Fixes: 3c7623fb5bb6 ("drm/hisilicon/hibmc: Enable this hot plug detect of irq feature") >> Signed-off-by: Baihan Li >> Signed-off-by: Yongbang Shi >> --- >> drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c | 27 +++++++++++++++---- >> drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h | 2 ++ >> .../gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c | 10 ++++--- >> 3 files changed, 30 insertions(+), 9 deletions(-) >> >> diff --git a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c >> index 8f0daec7d174..2d2fb6e759c3 100644 >> --- a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c >> +++ b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c >> @@ -3,6 +3,7 @@ >> >> #include >> #include >> +#include >> #include "dp_config.h" >> #include "dp_comm.h" >> #include "dp_reg.h" >> @@ -162,6 +163,8 @@ int hibmc_dp_hw_init(struct hibmc_dp *dp) >> >> mutex_init(&dp_dev->lock); >> >> + drmm_mutex_init(drm_dev, &dp->link_train_mutex); >> + >> dp->dp_dev = dp_dev; >> >> dp_dev->dev = drm_dev; >> @@ -238,19 +241,33 @@ void hibmc_dp_display_en(struct hibmc_dp *dp, bool enable) >> msleep(50); >> } >> >> -int hibmc_dp_mode_set(struct hibmc_dp *dp, struct drm_display_mode *mode) >> +int hibmc_dp_detect_link(struct hibmc_dp *dp) >> { >> struct hibmc_dp_dev *dp_dev = dp->dp_dev; >> - int ret; >> + int ret = 0; >> + >> + mutex_lock(&dp->link_train_mutex); >> >> if (!dp_dev->link.status.channel_equalized) { >> ret = hibmc_dp_link_training(dp_dev); >> - if (ret) { >> + if (ret) >> drm_err(dp->drm_dev, "dp link training failed, ret: %d\n", ret); >> - return ret; >> - } >> } >> >> + mutex_unlock(&dp->link_train_mutex); >> + >> + return ret; >> +} >> + >> +int hibmc_dp_mode_set(struct hibmc_dp *dp, struct drm_display_mode *mode) >> +{ >> + struct hibmc_dp_dev *dp_dev = dp->dp_dev; >> + int ret; >> + >> + ret = hibmc_dp_detect_link(dp); >> + if (ret) >> + return ret; >> + >> hibmc_dp_display_en(dp, false); >> hibmc_dp_link_cfg(dp_dev, mode); >> >> diff --git a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h >> index 665f5b166dfb..9b45e88e47e4 100644 >> --- a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h >> +++ b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h >> @@ -50,9 +50,11 @@ struct hibmc_dp { >> struct drm_dp_aux aux; >> struct hibmc_dp_cbar_cfg cfg; >> u32 irq_status; >> + struct mutex link_train_mutex; /* link training mutex */ >> }; >> >> int hibmc_dp_hw_init(struct hibmc_dp *dp); >> +int hibmc_dp_detect_link(struct hibmc_dp *dp); >> int hibmc_dp_mode_set(struct hibmc_dp *dp, struct drm_display_mode *mode); >> void hibmc_dp_display_en(struct hibmc_dp *dp, bool enable); >> void hibmc_dp_set_cbar(struct hibmc_dp *dp, const struct hibmc_dp_cbar_cfg *cfg); >> diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c >> index d06832e62e96..354e18bb2998 100644 >> --- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c >> +++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c >> @@ -34,9 +34,12 @@ static int hibmc_dp_connector_get_modes(struct drm_connector *connector) >> static int hibmc_dp_detect(struct drm_connector *connector, >> struct drm_modeset_acquire_ctx *ctx, bool force) >> { >> - mdelay(200); >> + struct hibmc_drm_private *priv = to_hibmc_drm_private(connector->dev); >> >> - return drm_connector_helper_detect_from_ddc(connector, ctx, force); >> + if (!hibmc_dp_detect_link(&priv->dp)) >> + return connector_status_connected; >> + >> + return connector_status_disconnected; >> } >> >> static const struct drm_connector_helper_funcs hibmc_dp_conn_helper_funcs = { >> @@ -128,8 +131,7 @@ irqreturn_t hibmc_dp_hpd_isr(int irq, void *arg) >> hibmc_dp_reset_link(&priv->dp); >> } >> >> - if (dev->registered) >> - drm_connector_helper_hpd_irq_event(&priv->dp.connector); >> + drm_connector_helper_hpd_irq_event(&priv->dp.connector); >> >> drm_dev_exit(idx); >> >> -- >> 2.33.0 >>