From: Robin Murphy <robin.murphy@arm.com>
To: gengdongjiu <gengdongjiu@huawei.com>,
catalin.marinas@arm.com, will.deacon@arm.com,
marc.zyngier@arm.com, christoffer.dall@linaro.org,
james.morse@arm.com, mark.rutland@arm.com,
ard.biesheuvel@linaro.org, cov@codeaurora.org,
Dave.Martin@arm.com, suzuki.poulose@arm.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH v1 1/3] arm64: add a macro for SError synchronization
Date: Wed, 1 Nov 2017 13:31:03 +0000 [thread overview]
Message-ID: <32039c76-8e9b-77e5-dfe6-3f519821a08d@arm.com> (raw)
In-Reply-To: <d7b8b779-9e00-8e8f-b44e-48e3d7e37058@huawei.com>
On 01/11/17 12:54, gengdongjiu wrote:
> Hi Robin,
>
> On 2017/11/1 19:24, Robin Murphy wrote:
>>> + esb
>>> +alternative_else_nop_endif
>>> +1:
>>> + .endm
>> Having a branch in here is pretty horrible, and furthermore using label
>> number 1 has a pretty high chance of subtly breaking code where this
>> macro is inserted.
>>
>> Can we not somehow nest or combine the alternative conditions here?
>
> I found it will report error if combine the alternative conditions here.
>
> For example:
>
> + .macro error_synchronize
> +alternative_if ARM64_HAS_IESB
> +alternative_if ARM64_HAS_RAS_EXTN
> + esb
> +alternative_else_nop_endif
> +alternative_else_nop_endif
> + .endm
>
> And even using b.eq/cbz instruction in the alternative instruction in arch/arm64/kernel/entry.S,
> it will report Error.
>
> For example below
>
> alternative_if ARM64_HAS_PAN
> xxxxxxxxxxxxxxxxxxxx
> b.eq xxxxx
> alternative_else_nop_endif
>
> I do not dig it deeply, do you know the reason about it or good suggestion about that?
> Thanks a lot in advance.
Actually, on second look ARM64_HAS_RAS_EXTN doesn't even matter - ESB is
a hint, so if the CPU doesn't have RAS it should behave as a NOP anyway.
On which note, since I don't see one here - are any of those other
patches defining an "esb" assembly macro similar to the inline asm case?
If not then this isn't going to build with older toolchains - perhaps we
should just use the raw hint syntax directly.
Robin.
next prev parent reply other threads:[~2017-11-01 13:31 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-01 19:14 [PATCH v1 0/3] manually add Error Synchronization Barrier at exception handler entry and exit Dongjiu Geng
2017-11-01 11:21 ` Robin Murphy
2017-11-01 11:32 ` James Morse
2017-11-01 12:44 ` gengdongjiu
2017-11-01 19:14 ` [PATCH v1 1/3] arm64: add a macro for SError synchronization Dongjiu Geng
2017-11-01 11:24 ` Robin Murphy
2017-11-01 12:54 ` gengdongjiu
2017-11-01 13:31 ` Robin Murphy [this message]
2017-11-01 14:16 ` Mark Rutland
2017-11-02 8:52 ` gengdongjiu
2017-11-01 19:14 ` [PATCH v1 2/3] arm64: add error synchronization barrier in kernel_entry/kernel_exit Dongjiu Geng
2017-11-04 17:34 ` kbuild test robot
2017-11-01 19:14 ` [PATCH v1 3/3] KVM: arm64: add ESB in exception handler entry and exit Dongjiu Geng
2017-11-04 18:49 ` kbuild test robot
-- strict thread matches above, loose matches on Subject: below --
2017-11-01 14:13 [PATCH v1 1/3] arm64: add a macro for SError synchronization gengdongjiu
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