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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-89f580173efsm309841b3a.50.2026.10.15.18.18.57 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 15 Oct 2026 18:19:04 -0700 (PDT) Message-ID: <324a3513-11cd-4e22-9b51-0aaa46354d26@oss.qualcomm.com> Date: Fri, 16 Oct 2026 09:18:55 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] arm64: dts: qcom: nord: add CoreSight debug nodes To: Konrad Dybcio , Shawn Guo , Bjorn Andersson Cc: Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260922100850.527109-1-shengchao.guo@oss.qualcomm.com> <20260922100850.527109-3-shengchao.guo@oss.qualcomm.com> <25956f40-e7e1-4815-94a2-54ee8b1a50e7@oss.qualcomm.com> Content-Language: en-US From: Jie Gan In-Reply-To: <25956f40-e7e1-4815-94a2-54ee8b1a50e7@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: xXHOjkrdpnxPZ-rfOrNE8RarC5zyq13c X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE2MDAwNCBTYWx0ZWRfX3dGQVZyflKiU WrPxDx33TJ/i7EjJ5C1v+0qN8ap0nzX0cRjaB/utt3EvhrU/6gZcXIqD8uuH9p3C98YT+nuy3zF OQi0KmdZgC2Bl4Di9po9yUFttWar+xs= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE2MDAwNCBTYWx0ZWRfXwjJEW+aAJ49z I3CuVhDQ6HEuQoUejVTEK2cJeY1Y+ssv/SeIqgFacLJrBqN+XI99DzdAFFudmk1FFlMQAa6au1f 6sS90zthPJ2Hk7kRkuqTL+euPTMhxxtP4FaETc57luRtS36Ne4q3hBhUn16AYsU/Old6wIjkkZr JpeTHvhdj/LRmYeeD9M4wY1bFzPhBdyqLaq/aBzyLcqsJVtXM2MV/E3/xcTf+oAjJ7Rz9T7RE1U qk78A/09rj3IliQzxPTFAFrv+L0xUcKRC38CR3uyugf++jAm6PDsqogVsvZDRPD570X9dl9eUJ8 5AErkgy8n8AXz6OjFeh6kFHcss+y7NXub7dlz2wjSa6DqxMYfy0Z/kf7LU14XZpZYn6yg8a5uqa fsSXjAaT5u8b7Ia+8k6ppCGMVdeM2bgoAnXFa+U0qlUlj2wPtI3NVCUhIgvg/1Dous64Y7Rk6mE drKcA8IKXkctpGUza5g== X-Proofpoint-GUID: xXHOjkrdpnxPZ-rfOrNE8RarC5zyq13c X-Authority-Analysis: v=2.4 cv=L/CI0OT8 c=1 sm=1 tr=0 ts=6ad17b8c cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=xuU9YvB76CLXlpF1iJ4A:9 a=QEXdDO2ut3YA:10 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-14_01,2026-10-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 malwarescore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 impostorscore=0 phishscore=0 adultscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610160004 On 10/15/2026 10:18 PM, Konrad Dybcio wrote: > On 9/22/26 12:08 PM, Shawn Guo wrote: >> From: Jie Gan >> >> Add the CoreSight trace topology for the Qualcomm Nord SoC: CTCU, STM, >> TPDM/TPDA sources and aggregators, funnels, replicators, TMC ETR/ETF >> sinks, TNoC/ITNoC nodes and per-subsystem CTIs. This wires up trace >> sources for SOCCP, BCV/IMH/DPM, GCC, QM, DL_NOC, the CDSP NSP0-3 >> clusters, DLMM, EVA, MDSS0/1, LPASS and the AOSS SWAO priority TPDMs, >> plus the DDR0-3 channel and LLCC TPDMs, all funneled through the >> tn_ag aggregator into the main CoreSight funnel and out to the AOSS >> sink. > > [...] > > >> + tpdm@12410000 { >> + compatible = "qcom,coresight-tpdm", "arm,primecell"; >> + reg = <0x0 0x12410000 0x0 0x1000>; >> + >> + clocks = <&aoss_qmp>; >> + clock-names = "apb_pclk"; >> + label = "tpdm_ddr3_llcc_2"; >> + >> + qcom,cmb-element-bits = <32>; >> + qcom,cmb-msrs-num = <32>; >> + >> + out-ports { >> + port { >> + ddr2_tpdm2_out: endpoint { >> + remote-endpoint = <&ddr2_tn_in9>; >> + }; >> + }; >> + }; >> + }; >> + >> + tpdm@12411000 { >> + compatible = "qcom,coresight-tpdm", "arm,primecell"; >> + reg = <0x0 0x12411000 0x0 0x1000>; >> + >> + clocks = <&aoss_qmp>; >> + clock-names = "apb_pclk"; >> + label = "tpdm_ddr3_llcc_3"; > > GPT points out the labels should be ddr2_, not ddr3_ on these nodes Confirmed should be ddr2_ . Thanks, Jie > > Konrad