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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id z61-20020a509e43000000b00425e4d583e4sm63517ede.87.2022.04.24.04.06.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 24 Apr 2022 04:06:56 -0700 (PDT) Message-ID: <32507f1d-b650-e2c9-2f04-1ac63c6774ec@linaro.org> Date: Sun, 24 Apr 2022 13:06:55 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH 4/5] mtd: onenand: samsung: Make sure that bus clock is enabled Content-Language: en-US To: Jonathan Bakker , Miquel Raynal Cc: Kyungmin Park , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, Tomasz Figa , =?UTF-8?Q?Pawe=c5=82_Chmiel?= References: <20220423034524.366612-1-xc-racer2@live.ca> <20220423034622.366696-1-xc-racer2@live.ca> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23/04/2022 05:46, Jonathan Bakker wrote: > From: Tomasz Figa > > This patch adds basic handling of controller bus clock to make sure that > in device probe it is enabled and device can operate correctly. The > clock is optional and driver behavior is identical as before this patch > if not provided. > > Signed-off-by: Tomasz Figa > Signed-off-by: Paweł Chmiel > Reviewed-by: Miquel Raynal > Signed-off-by: Jonathan Bakker > --- > drivers/mtd/nand/onenand/onenand_samsung.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/mtd/nand/onenand/onenand_samsung.c b/drivers/mtd/nand/onenand/onenand_samsung.c > index a3ef4add865a..62014f8d27b6 100644 > --- a/drivers/mtd/nand/onenand/onenand_samsung.c > +++ b/drivers/mtd/nand/onenand/onenand_samsung.c > @@ -11,6 +11,7 @@ > * S5PC110: use DMA > */ > > +#include > #include > #include > #include > @@ -122,6 +123,7 @@ enum soc_type { > struct s3c_onenand { > struct mtd_info *mtd; > struct platform_device *pdev; > + struct clk *clk_bus; > enum soc_type type; > void __iomem *ctrl_base; > void __iomem *chip_base; > @@ -914,6 +916,10 @@ static int s3c_onenand_probe(struct platform_device *pdev) > } > } > > + onenand->clk_bus = devm_clk_get(&pdev->dev, "bus"); If it is optional, use optional clk API. > + if (!IS_ERR(onenand->clk_bus)) > + clk_prepare_enable(onenand->clk_bus); > + > err = onenand_scan(mtd, 1); > if (err) > return err; Error paths not updated. Also what about other clocks? I propose you should take over the authorship of the patch because it will be more changes. > @@ -945,6 +951,8 @@ static int s3c_onenand_remove(struct platform_device *pdev) > struct mtd_info *mtd = platform_get_drvdata(pdev); > > onenand_release(mtd); > + if (!IS_ERR(onenand->clk_bus)) > + clk_disable_unprepare(onenand->clk_bus); > > return 0; > } Best regards, Krzysztof