From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4D1AC31E49 for ; Sun, 16 Jun 2019 12:45:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A95F320870 for ; Sun, 16 Jun 2019 12:45:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="fBMNN+Jl" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727150AbfFPMow (ORCPT ); Sun, 16 Jun 2019 08:44:52 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:50988 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725865AbfFPMow (ORCPT ); Sun, 16 Jun 2019 08:44:52 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x5GCiLhA033414; Sun, 16 Jun 2019 07:44:21 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1560689061; bh=19H8228T7JxbHupQvwDqhQcBwn5pS/mQpYoEWhiFVCA=; h=From:Subject:To:CC:References:Date:In-Reply-To; b=fBMNN+Jl7jtZzcNJVVeNu23O1SMLIJURY6HkAxnEugTApS0+Qf+8w4dTVl5udZW9I WWkTepki3mCK0/KTL9D7KhWO8mofjFaG6vluM3At9EHCZ7FJ1MK85p8JAtYTO45Vc8 JIsly0gmjIo/3EETy2UfYgeE/p0YT3PapwEPfhDE= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x5GCiL4U024120 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 16 Jun 2019 07:44:21 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Sun, 16 Jun 2019 07:44:20 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Sun, 16 Jun 2019 07:44:20 -0500 Received: from [10.250.133.146] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x5GCiGQW130920; Sun, 16 Jun 2019 07:44:17 -0500 From: Vignesh Raghavendra Subject: Re: [PATCH v5 1/3] mtd: spi-nor: add support for is25wp256 To: Sagar Shrikant Kadam , , , , , , , , , CC: , , , References: <1560336476-31763-1-git-send-email-sagar.kadam@sifive.com> <1560336476-31763-2-git-send-email-sagar.kadam@sifive.com> Message-ID: <325855d0-00f9-df8a-ea57-c140d39dd6ef@ti.com> Date: Sun, 16 Jun 2019 18:14:16 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.7.1 MIME-Version: 1.0 In-Reply-To: <1560336476-31763-2-git-send-email-sagar.kadam@sifive.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 12-Jun-19 4:17 PM, Sagar Shrikant Kadam wrote: [...] > @@ -4129,7 +4137,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, > if (ret) > return ret; > > - if (nor->addr_width) { > + if (nor->addr_width && JEDEC_MFR(info) != SNOR_MFR_ISSI) { > /* already configured from SFDP */ Hmm, why would you want to ignore addr_width that's read from SFDP table? Regards Vignesh > } else if (info->addr_width) { > nor->addr_width = info->addr_width; > diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h > index b3d360b..ff13297 100644 > --- a/include/linux/mtd/spi-nor.h > +++ b/include/linux/mtd/spi-nor.h > @@ -19,6 +19,7 @@ > #define SNOR_MFR_ATMEL CFI_MFR_ATMEL > #define SNOR_MFR_GIGADEVICE 0xc8 > #define SNOR_MFR_INTEL CFI_MFR_INTEL > +#define SNOR_MFR_ISSI 0x9d /* ISSI */ > #define SNOR_MFR_ST CFI_MFR_ST /* ST Micro */ > #define SNOR_MFR_MICRON CFI_MFR_MICRON /* Micron */ > #define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX >