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Mon, 15 Jul 2024 10:39:01 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id n+I8AEX8lGbvIwAAD6G6ig (envelope-from ); Mon, 15 Jul 2024 10:39:01 +0000 Message-ID: <326f51f7-bcb0-4214-ae0e-7dd1d96f5e97@suse.de> Date: Mon, 15 Jul 2024 13:38:56 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 09/12] PCI: brcmstb: Refactor for chips with many regular inbound BARs To: Jim Quinlan , linux-pci@vger.kernel.org, Nicolas Saenz Julienne , Bjorn Helgaas , Lorenzo Pieralisi , Cyril Brulebois , Stanimir Varbanov , Krzysztof Kozlowski , bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com Cc: Florian Fainelli , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , "moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE" , open list References: <20240710221630.29561-1-james.quinlan@broadcom.com> <20240710221630.29561-10-james.quinlan@broadcom.com> Content-Language: en-US From: Stanimir Varbanov In-Reply-To: <20240710221630.29561-10-james.quinlan@broadcom.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spamd-Result: default: False [-4.29 / 50.00]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; XM_UA_NO_VERSION(0.01)[]; RCPT_COUNT_TWELVE(0.00)[17]; MIME_TRACE(0.00)[0:+]; ARC_NA(0.00)[]; FREEMAIL_TO(0.00)[broadcom.com,vger.kernel.org,kernel.org,google.com,arm.com,debian.org,suse.de,gmail.com]; RCVD_VIA_SMTP_AUTH(0.00)[]; MID_RHS_MATCH_FROM(0.00)[]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; RCVD_TLS_ALL(0.00)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; FUZZY_BLOCKED(0.00)[rspamd.com]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:email,broadcom.com:email,imap1.dmz-prg2.suse.org:helo] X-Spam-Flag: NO X-Spam-Score: -4.29 X-Spam-Level: On 7/11/24 01:16, Jim Quinlan wrote: > Previously, our chips provided three inbound "BARS" with fixed purposes: > the first was for mapping SoC internal registers, the second was for > memory, and the third was for memory but with the endian swapped. We > typically only used one of these BARs. > > Complicating that BARs usage was the fact that the PCIe HW would do a > baroque internal mapping of system memory, and concatenate the regions of > multiple memory controllers. > > Newer chips such as the 7712 and Cable Modem SOCs have taken a step forward > and now provide multiple inbound BARs. This works in concert with the > dma-ranges property, where each provided range becomes an inbound BAR. > > This commit provides support for these new chips and their multiple > inbound BARs but also keeps the legacy support for the older system. > > Signed-off-by: Jim Quinlan > --- > drivers/pci/controller/pcie-brcmstb.c | 216 ++++++++++++++++++++------ > 1 file changed, 167 insertions(+), 49 deletions(-) > Reviewed-by: Stanimir Varbanov ~Stan