From: Reinette Chatre <reinette.chatre@intel.com>
To: "Drew Fustini" <fustini@kernel.org>,
"Adrien Ricciardi" <aricciardi@baylibre.com>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Atish Patra" <atish.patra@linux.dev>,
"Babu Moger" <babu.moger@amd.com>,
"Ben Horgan" <ben.horgan@arm.com>,
"Borislav Petkov" <bp@alien8.de>,
"Chen Pei" <cp0613@linux.alibaba.com>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Conor Dooley" <conor+dt@kernel.org>,
"Dave Hansen" <dave.hansen@linux.intel.com>,
"Dave Martin" <Dave.Martin@arm.com>,
"Fenghua Yu" <fenghuay@nvidia.com>,
"Gong Shuai" <gong.shuai@sanechips.com.cn>,
"Gong Shuai" <gsh517@gmail.com>,
guo.wenjia23@zte.com.cn, "James Morse" <james.morse@arm.com>,
"Kornel Dulęba" <mindal@semihalf.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
liu.qingtao2@zte.com.cn,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Paul Walmsley" <pjw@kernel.org>,
"Peter Newman" <peternewman@google.com>,
"Radim Krčmář" <radim.krcmar@oss.qualcomm.com>,
"Rob Herring" <robh@kernel.org>,
"Samuel Holland" <samuel.holland@sifive.com>,
"Sunil V L" <sunilvl@oss.qualcomm.com>,
"Tony Luck" <tony.luck@intel.com>,
"Weiwei Li" <liwei1518@gmail.com>,
"yunhui cui" <cuiyunhui@bytedance.com>,
"Zhanpeng Zhang" <zhangzhanpeng.jasper@bytedance.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Jonathan Cameron <jic23@kernel.org>,
Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>,
<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
<x86@kernel.org>, <devicetree@vger.kernel.org>,
<linux-doc@vger.kernel.org>
Subject: Re: [PATCH v10 6/6] MAINTAINERS: resctrl: Add myself as reviewer
Date: Wed, 4 Nov 2026 09:05:26 -0800 [thread overview]
Message-ID: <3280b1b1-5697-4b62-9865-2601a86fb907@intel.com> (raw)
In-Reply-To: <20261104-dfustini-atl-sc-cbqri-dt-v10-6-1636a003a3c0@kernel.org>
Hi Drew,
On 11/4/26 8:35 AM, Drew Fustini wrote:
> The RISC-V CBQRI support builds on the common resctrl code, so changes
> there affect RISC-V. Add myself as a reviewer to stay aware of them.
>
> Suggested-by: Reinette Chatre <reinette.chatre@intel.com>
> Signed-off-by: Drew Fustini <fustini@kernel.org>
> ---
Thank you very much.
Acked-by: Reinette Chatre <reinette.chatre@intel.com>
Reinette
next prev parent reply other threads:[~2026-11-04 17:05 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-04 16:35 [PATCH v10 0/6] riscv: Add initial CBQRI resctrl support Drew Fustini
2026-11-04 16:35 ` [PATCH v10 1/6] riscv_cbqri: Add capacity controller core Drew Fustini
2026-11-04 16:35 ` [PATCH v10 2/6] riscv_cbqri: resctrl: Add cache allocation via capacity block mask Drew Fustini
2026-11-04 16:35 ` [PATCH v10 3/6] riscv_cbqri: Make RESCTRL_FS available on RISC-V Drew Fustini
2026-11-04 16:35 ` [PATCH v10 4/6] dt-bindings: riscv: Add binding for CBQRI controllers Drew Fustini
2026-11-04 16:35 ` [PATCH v10 5/6] riscv_cbqri: Add CBQRI capacity allocation platform driver Drew Fustini
2026-11-04 16:35 ` [PATCH v10 6/6] MAINTAINERS: resctrl: Add myself as reviewer Drew Fustini
2026-11-04 17:05 ` Reinette Chatre [this message]
2026-11-05 1:14 ` [tip: x86/urgent] " tip-bot2 for Drew Fustini
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