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Thu, 13 Oct 2022 16:02:50 GMT Received: from [10.38.241.12] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Thu, 13 Oct 2022 09:02:46 -0700 Message-ID: <32af4444-9c88-eb0f-eda7-24fa0418aff6@quicinc.com> Date: Thu, 13 Oct 2022 09:02:44 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.2 Subject: Re: [Freedreno] [PATCH v3 06/10] drm/msm/dsi: Migrate to drm_dsc_compute_rc_parameters() Content-Language: en-US To: Marijn Suijten CC: , Vinod Koul , Jami Kettunen , David Airlie , , Vladimir Lypak , Konrad Dybcio , , Douglas Anderson , Rob Clark , Martin Botka , <~postmarketos/upstreaming@lists.sr.ht>, Daniel Vetter , AngeloGioacchino Del Regno , Dmitry Baryshkov , , Sean Paul , References: <20221009184824.457416-1-marijn.suijten@somainline.org> <20221009185058.460688-1-marijn.suijten@somainline.org> <5c178d7e-5022-f5e5-791d-d3800114b42b@quicinc.com> <20221013093646.c65mbjc6oekd7gha@SoMainline.org> From: Abhinav Kumar In-Reply-To: <20221013093646.c65mbjc6oekd7gha@SoMainline.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ugdfzT4CmzreMjEF5Ak7NdJbjnZLkbxn X-Proofpoint-ORIG-GUID: ugdfzT4CmzreMjEF5Ak7NdJbjnZLkbxn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-13_08,2022-10-13_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxscore=0 adultscore=0 suspectscore=0 spamscore=0 bulkscore=0 phishscore=0 impostorscore=0 mlxlogscore=999 clxscore=1015 malwarescore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210130092 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/13/2022 2:36 AM, Marijn Suijten wrote: > On 2022-10-12 16:03:06, Abhinav Kumar wrote: >> >> >> On 10/9/2022 11:50 AM, Marijn Suijten wrote: >>> As per the FIXME this code is entirely duplicate with what is already >>> provided inside drm_dsc_compute_rc_parameters(), and it is yet unknown >>> why this comment was put in place instead of resolved from the get-go. >>> Not only does it save on duplication, it would have also spared certain >>> issues. >>> >>> For example, this code from downstream assumed dsc->bits_per_pixel to >>> contain an integer value, whereas the upstream drm_dsc_config struct has >>> it with 4 fractional bits. drm_dsc_compute_rc_parameters() already >>> accounts for this feat, and the sole remaining use of >>> dsc->bits_per_pixel inside dsi_populate_dsc_params() will be addressed >>> in a separate patch. >>> >> >> This is a nice cleanup! Thanks for doing this. I would actually like to >> move towards the drm_dsc_compute_rc_parameters() API. >> >> But I would like to hold back this change till Vinod clarifies because >> Vinod had mentioned that with drm_dsc_compute_rc_parameters() he was >> seeing a mismatch in the computation of two values. >> >> slice_bpg_offset and the final_offset. > > Unsurprisingly so because final_offset, and slice_bpg_offset through > initial_offset depend directly on bits_per_pixel. The main takeaway of > this series is that Vinod was interpreting this field as integer instead > of containing 4 fractional bits. If he updates his the panel driver [1] > to set bits_per_pixel = 8 << 4 instead of just 8 to account for this, > the values should check out once again. > > [1]: https://git.linaro.org/people/vinod.koul/kernel.git/commit/?h=topic/pixel3_5.18-rc1&id=1d7d98ad564f1ec69e7525e07418918d90f247a1 > > Once Vinod (or someone else in the posession of a Pixel 3) confirms > this, I can respin this series and more explicitly explain why the FIXME > was put in place, instead of being resolved outright? > > - Marijn Makes perfect sense to me. Will just wait for Vinod's tested-by. > >> >> The difference between the upstream drm_dsc_compute_rc_parameters() and >> dsi_populate_dsc_params() causing this was not clear to me from his >> explanation earlier. >> >> So this was left as a to-do item. >> >> I would like this to be re-tested on pixel3 and check if this works for >> vinod. If not, i think its the right time to debug why and not delay >> this more. >> >> Thanks >> >> Abhinav