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Sun, 04 Jan 2026 20:55:02 -0800 (PST) X-Google-Smtp-Source: AGHT+IFacj7culxX1WSh1Rq5jfZxcULqvVOrEjZIp8JekHVlP7djaScfvXdTMwv9fW0VLbjINJOlHQ== X-Received: by 2002:a05:6a20:a104:b0:366:14b0:4b18 with SMTP id adf61e73a8af0-389593bda2fmr5948184637.35.1767588902398; Sun, 04 Jan 2026 20:55:02 -0800 (PST) Received: from [10.218.35.45] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-34f476f8f3fsm4806409a91.5.2026.01.04.20.54.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 04 Jan 2026 20:55:01 -0800 (PST) Message-ID: <32f1b476-c3b5-4912-bf60-b24ff67a4320@oss.qualcomm.com> Date: Mon, 5 Jan 2026 10:24:54 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/7] clk: qcom: gcc: Do not turn off PCIe GDSCs during gdsc_disable() To: Konrad Dybcio , Bjorn Andersson , Michael Turquette , Stephen Boyd , Taniya Das , Konrad Dybcio , Bartosz Golaszewski , Shazad Hussain , Sibi Sankar , Bryan O'Donoghue , Melody Olvera , Dmitry Baryshkov , Taniya Das , Dmitry Baryshkov , Imran Shaik , Abel Vesa Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Rajendra Nayak , manivannan.sadhasivam@oss.qualcomm.com, stable@vger.kernel.org References: <20260102-pci_gdsc_fix-v1-0-b17ed3d175bc@oss.qualcomm.com> <500313f1-51fd-450e-877e-e4626b7652bc@oss.qualcomm.com> <4d61e8b3-0d40-4b78-9f40-a68b05284a3d@oss.qualcomm.com> Content-Language: en-US From: Krishna Chaitanya Chundru In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTA1MDA0MyBTYWx0ZWRfX9dMN8cWAC96q GQ4krL/SM0hha6z58121pJ0amuLE1guWIaFwDGnpuALct+eUaHR8YvKmhFPU6RXNYsLM5Zyifqa thxCJ6kHO/oQL1BB28n9dqCHxPYQyxBeQHp5V+v4DQegU55GM0tNqgnEuM74o/Rps3o+s55fQqR iiT9L/gRDnQoA7QrtlCywHTJ8mUqEuJFsgVrm8ZwdJ0mNYd8+pt9ldmEJI+A3ZL64kmy7/Vo9NA 2HYmX1YI3Q1ua9nQWXrGDnLgJ2bsu8HaVQFZmqpYZ12TQcB4FUDTZ2++rnmliHg6LB27ZWMr1ah WVG8sBtNYWQzBtMKOXL7GGlyR4nx7hH2j4q9YAFZFM8SmOBU3gbIwZgFE9hmu14gPWKT6xOjZdM OR8Ia61XXfwqgPiBiCgr/sSe9+6xlR872pTJVq8v6SbQFp6NAhq9oh4N16Zyq4yDDdTGOGQaWsU 6/ggQCOBLn+n+JMnwlA== X-Proofpoint-GUID: arApEUa71DlaOz4bApbLKEx_8LbKAkjb X-Authority-Analysis: v=2.4 cv=RrbI7SmK c=1 sm=1 tr=0 ts=695b4427 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=7th-FYyNm21myA_937sA:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-ORIG-GUID: arApEUa71DlaOz4bApbLKEx_8LbKAkjb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-04_07,2025-12-31_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 spamscore=0 impostorscore=0 malwarescore=0 suspectscore=0 adultscore=0 priorityscore=1501 bulkscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2601050043 On 1/2/2026 7:27 PM, Konrad Dybcio wrote: > On 1/2/26 2:19 PM, Krishna Chaitanya Chundru wrote: >> >> On 1/2/2026 5:09 PM, Konrad Dybcio wrote: >>> On 1/2/26 12:36 PM, Krishna Chaitanya Chundru wrote: >>>> On 1/2/2026 5:04 PM, Konrad Dybcio wrote: >>>>> On 1/2/26 10:43 AM, Krishna Chaitanya Chundru wrote: >>>>>> With PWRSTS_OFF_ON, PCIe GDSCs are turned off during gdsc_disable(). This >>>>>> can happen during scenarios such as system suspend and breaks the resume >>>>>> of PCIe controllers from suspend. >>>>> Isn't turning the GDSCs off what we want though? At least during system >>>>> suspend? >>>> If we are keeping link in D3cold it makes sense, but currently we are not keeping in D3cold >>>> so we don't expect them to get off. >>> Since we seem to be tackling that in parallel, it seems to make sense >>> that adding a mechanism to let the PCIe driver select "on" vs "ret" vs >>> "off" could be useful for us >> At least I am not aware of such API where we can tell genpd not to turn off gdsc >> at runtime if we are keeping the device in D3cold state. >> But anyway the PCIe gdsc supports Retention, in that case adding this flag here makes >> more sense as it represents HW. >> sm8450,sm8650 also had similar problem which are fixed by mani[1]. > Perhaps I should ask for a clarification - is retention superior to > powering the GDSC off? Does it have any power costs? > >>> FWIW I recall I could turn off the GDSCs on at least makena with the old >>> suspend patches and the controllers would come back to life afterwards >> In the suspend patches, we are keeping link in D3cold, so turning off gdsc will not have any effect. > What do you mean by it won't have any effect? I meant to say that in this case we can turn off the gdsc and it won't have any effect in SW. But in non D3cold case the link will be broken and will become non functional. - Krishna Chaitanya. >> But if some reason we skipped D3cold like in S2idle case then gdsc should not be off, in that case >> in resume PCIe link will be broken. > Right, obviously > > Konrad