From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 30BE4302CB3; Tue, 24 Jun 2025 15:09:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750777769; cv=none; b=g7vC9F9VO2/t9L2z8GWvB7urqWiHxhds8eQjW5EfkRg5LZeI94Yq1Om4bbspYaAd9yZ72Odf3V+C5KGXXIRIQFuX3tHDt6kRdXLxrHjMg99qq9eyEfx4eLzjGrQn/vATTHZnKpNTjsNF2GFn0pLEWCwyBWBYdXUl5X4XhaWv/ro= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750777769; c=relaxed/simple; bh=j4U0G9PmAbm5SXv2TgKAMjj1kvsuGzzoXlg5TgpL514=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=S3taxC+btHtTVc/slxB5WS3t4aQWU9qQhpyiz623vqE5Dax1lJd21e9tSmux2KbfnaV/k+0ezPEeG5dn3qiCJCRgMHww6oIDTUfM+dvA/DE1eRIcjb22W5cWhgtqiM7v2rcwZyzPPkYvVb3X2ta2uFTvyad0VdWpJvWMVo6OIGI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=b4Xlt9bh; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="b4Xlt9bh" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1750777767; x=1782313767; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=j4U0G9PmAbm5SXv2TgKAMjj1kvsuGzzoXlg5TgpL514=; b=b4Xlt9bhrcp4rd74AubAz+3f9oJ0izvQ/xIFiln5KL3d9wQyv+8oN8uF rIV+TVdo+SJnGTbpAvyKfD6Rn8UOrfqnZefdjoc4oOfaSA6doWiCRD5O+ vON7sLSvKpPjQWhhOtJL3Uul3Od0HRLgcVE5zs44/ubju83Q4yUPPQDBr 65CBtLP9T3vi4z8FmJMWF8s6ubg7gKizedU6Z8O4HsISAHTTuhFDsav/c mokQ4xb4RFO62BoCUkVBE+lVFMKa5Q4QllXS78EE66Fa8J/6R27LfkLyw 6XDL4vF6Fq+MrzMv/Zy4NJ6KnUVtvxEuEWMv7wXWfqkpwbMAjYLbkvlTt Q==; X-CSE-ConnectionGUID: ticneE1VRpCt6c5L3blMOw== X-CSE-MsgGUID: 45hWAS1ySROWMxp9r7X/gA== X-IronPort-AV: E=Sophos;i="6.16,262,1744095600"; d="scan'208";a="210641600" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 24 Jun 2025 08:09:21 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Tue, 24 Jun 2025 08:08:40 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Tue, 24 Jun 2025 08:08:40 -0700 From: To: , , , , CC: , , , , Subject: [PATCH v2 29/32] clk: at91: at91sam9rl: switch to clk_parent_data Date: Tue, 24 Jun 2025 08:08:26 -0700 Message-ID: <330369706e18903b56fbc69926013557802439d0.1750182562.git.Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain From: Claudiu Beznea Switch AT91SAM9RL clocks to use parent_hw and parent_data. Having parent_hw instead of parent names improves to clock registration speed and re-parenting. Signed-off-by: Claudiu Beznea Signed-off-by: Ryan Wanner --- drivers/clk/at91/at91sam9rl.c | 63 ++++++++++++++++------------------- 1 file changed, 28 insertions(+), 35 deletions(-) diff --git a/drivers/clk/at91/at91sam9rl.c b/drivers/clk/at91/at91sam9rl.c index 969f809e7d65..5b342b707213 100644 --- a/drivers/clk/at91/at91sam9rl.c +++ b/drivers/clk/at91/at91sam9rl.c @@ -28,13 +28,12 @@ static const struct clk_pll_characteristics sam9rl_plla_characteristics = { .out = sam9rl_plla_out, }; -static const struct { +static struct { char *n; - char *p; u8 id; } at91sam9rl_systemck[] = { - { .n = "pck0", .p = "prog0", .id = 8 }, - { .n = "pck1", .p = "prog1", .id = 9 }, + { .n = "pck0", .id = 8 }, + { .n = "pck1", .id = 9 }, }; static const struct { @@ -67,24 +66,14 @@ static const struct { static void __init at91sam9rl_pmc_setup(struct device_node *np) { - const char *slck_name, *mainxtal_name; + const char *slow_clk_name = "slowck", *main_xtal_name = "main_xtal"; + u8 slow_clk_index = 0, main_xtal_index = 1; + struct clk_parent_data parent_data[6]; struct pmc_data *at91sam9rl_pmc; - const char *parent_names[6]; struct regmap *regmap; struct clk_hw *hw; int i; - i = of_property_match_string(np, "clock-names", "slow_clk"); - if (i < 0) - return; - - slck_name = of_clk_get_parent_name(np, i); - - i = of_property_match_string(np, "clock-names", "main_xtal"); - if (i < 0) - return; - mainxtal_name = of_clk_get_parent_name(np, i); - regmap = device_node_to_regmap(np); if (IS_ERR(regmap)) return; @@ -95,13 +84,15 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np) if (!at91sam9rl_pmc) return; - hw = at91_clk_register_rm9200_main(regmap, "mainck", mainxtal_name, NULL); + hw = at91_clk_register_rm9200_main(regmap, "mainck", NULL, + &AT91_CLK_PD_NAME(main_xtal_name, main_xtal_index)); if (IS_ERR(hw)) goto err_free; at91sam9rl_pmc->chws[PMC_MAIN] = hw; - hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0, + hw = at91_clk_register_pll(regmap, "pllack", NULL, + &AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MAIN]), 0, &at91rm9200_pll_layout, &sam9rl_plla_characteristics); if (IS_ERR(hw)) @@ -109,18 +100,19 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np) at91sam9rl_pmc->chws[PMC_PLLACK] = hw; - hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL); + hw = at91_clk_register_utmi(regmap, NULL, "utmick", NULL, + &AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MAIN])); if (IS_ERR(hw)) goto err_free; at91sam9rl_pmc->chws[PMC_UTMI] = hw; - parent_names[0] = slck_name; - parent_names[1] = "mainck"; - parent_names[2] = "pllack"; - parent_names[3] = "utmick"; + parent_data[0] = AT91_CLK_PD_NAME(slow_clk_name, slow_clk_index); + parent_data[1] = AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MAIN]); + parent_data[2] = AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_PLLACK]); + parent_data[3] = AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_UTMI]); hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4, - parent_names, NULL, + NULL, parent_data, &at91rm9200_master_layout, &sam9rl_mck_characteristics, &sam9rl_mck_lock); @@ -128,7 +120,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np) goto err_free; hw = at91_clk_register_master_div(regmap, "masterck_div", - "masterck_pres", NULL, + NULL, &AT91_CLK_PD_HW(hw), &at91rm9200_master_layout, &sam9rl_mck_characteristics, &sam9rl_mck_lock, CLK_SET_RATE_GATE, 0); @@ -137,18 +129,18 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np) at91sam9rl_pmc->chws[PMC_MCK] = hw; - parent_names[0] = slck_name; - parent_names[1] = "mainck"; - parent_names[2] = "pllack"; - parent_names[3] = "utmick"; - parent_names[4] = "masterck_div"; + parent_data[0] = AT91_CLK_PD_NAME(slow_clk_name, slow_clk_index); + parent_data[1] = AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MAIN]); + parent_data[2] = AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_PLLACK]); + parent_data[3] = AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_UTMI]); + parent_data[4] = AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MCK]); for (i = 0; i < 2; i++) { char name[6]; snprintf(name, sizeof(name), "prog%d", i); hw = at91_clk_register_programmable(regmap, name, - parent_names, NULL, 5, i, + NULL, parent_data, 5, i, &at91rm9200_programmable_layout, NULL); if (IS_ERR(hw)) @@ -158,8 +150,8 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np) } for (i = 0; i < ARRAY_SIZE(at91sam9rl_systemck); i++) { - hw = at91_clk_register_system(regmap, at91sam9rl_systemck[i].n, - at91sam9rl_systemck[i].p, NULL, + hw = at91_clk_register_system(regmap, at91sam9rl_systemck[i].n, NULL, + &AT91_CLK_PD_HW(at91sam9rl_pmc->pchws[0]), at91sam9rl_systemck[i].id, 0); if (IS_ERR(hw)) goto err_free; @@ -170,7 +162,8 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np) for (i = 0; i < ARRAY_SIZE(at91sam9rl_periphck); i++) { hw = at91_clk_register_peripheral(regmap, at91sam9rl_periphck[i].n, - "masterck_div", NULL, + NULL, + &AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MCK]), at91sam9rl_periphck[i].id); if (IS_ERR(hw)) goto err_free; -- 2.43.0