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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-af91a1e6cecsm2578916266b.70.2025.08.14.04.21.40 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 14 Aug 2025 04:21:41 -0700 (PDT) Message-ID: <33442cc4-a205-46a8-a2b8-5c85c236c8d4@oss.qualcomm.com> Date: Thu, 14 Aug 2025 13:21:39 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] drm/msm: adreno: a6xx: enable GMU bandwidth voting for x1e80100 GPU To: Neil Armstrong , Rob Clark , Sean Paul , Konrad Dybcio , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov References: <20250725-topic-x1e80100-gpu-bwvote-v2-1-58d2fbb6a127@linaro.org> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODExMDA3NCBTYWx0ZWRfX8WE1dN1qwwdv BAXjidLu23QH3P1N9W7GT4XgdnFc6SxpZm0rTd6lLlDLtR223IypEmzf7WqH3GMX96/aB/8MBRg nkqF7FFdLGJMV4GRbpKp17ZcX+MIobl1tsIJ4Q2RNfGYDBzJnCxb+E8dH/GR2xzJQcFsIBIv2uO FPV42jq438YNwbSifgUnFiR4YCga/NUnBG8eirXxsmOizntlHfKyvAfPLN3DptmhXEadeatgL/P sUlt28bdA/7+AWxmm2m3Bby1xJAxnhptdfm7Nw/LePe0VITcA+AcH1N+VfN5xpGAq0Ru77Fw8sJ MGABMjOgr5tJgCkr1jb/C4+jcFd1AvOpxC/1Kn4F1uZt0gaRfoeBHfR90X3X9Mw8kDOW0UToGyt qURAGl/0 X-Proofpoint-GUID: ElC7HXhIU-EBL5nkING8ijXpzh-TI2cD X-Authority-Analysis: v=2.4 cv=TJFFS0la c=1 sm=1 tr=0 ts=689dc6c7 cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=VwQbUJbxAAAA:8 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=vBWWQJBIfp5UPC7yhvoA:9 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: ElC7HXhIU-EBL5nkING8ijXpzh-TI2cD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-13_02,2025-08-14_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 adultscore=0 impostorscore=0 malwarescore=0 phishscore=0 clxscore=1015 spamscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508110074 On 7/31/25 12:19 PM, Konrad Dybcio wrote: > On 7/25/25 10:35 AM, Neil Armstrong wrote: >> The Adreno GPU Management Unit (GMU) can also scale DDR Bandwidth along >> the Frequency and Power Domain level, but by default we leave the >> OPP core scale the interconnect ddr path. >> >> Declare the Bus Control Modules (BCMs) and the corresponding parameters >> in the GPU info struct to allow the GMU to vote for the bandwidth. >> >> Reviewed-by: Dmitry Baryshkov >> Signed-off-by: Neil Armstrong >> --- >> Changes in v2: >> - Used proper ACV perfmode bit/freq >> - Link to v1: https://lore.kernel.org/r/20250721-topic-x1e80100-gpu-bwvote-v1-1-946619b0f73a@linaro.org >> --- >> drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c >> index 00e1afd46b81546eec03e22cda9e9a604f6f3b60..892f98b1f2ae582268adebd758437ff60456cdd5 100644 >> --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c >> +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c >> @@ -1440,6 +1440,17 @@ static const struct adreno_info a7xx_gpus[] = { >> .pwrup_reglist = &a7xx_pwrup_reglist, >> .gmu_chipid = 0x7050001, >> .gmu_cgc_mode = 0x00020202, >> + .bcms = (const struct a6xx_bcm[]) { >> + { .name = "SH0", .buswidth = 16 }, >> + { .name = "MC0", .buswidth = 4 }, >> + { >> + .name = "ACV", >> + .fixed = true, >> + .perfmode = BIT(3), >> + .perfmode_bw = 16500000, > > Reviewed-by: Konrad Dybcio Actually no, BIT(3) is for the CPU (OS), GPU should use BIT(2) Konrad