From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Robert Marko <robimarko@gmail.com>,
andersson@kernel.org, abelvesa@kernel.org, sboyd@kernel.org,
bmasney+clk@redhat.com, jbrunet+clk@baylibre.com,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
konradybcio@kernel.org, taniya.das@oss.qualcomm.com,
ansuelsmth@gmail.com, john@phrozen.org,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 3/4] clk: qcom: gcc-ipq8074: Align CMN PLL inputs with binding
Date: Tue, 27 Oct 2026 11:59:11 +0100 [thread overview]
Message-ID: <3351a7c6-6dee-403d-a8be-57714397144c@oss.qualcomm.com> (raw)
In-Reply-To: <20261026120920.1667982-3-robimarko@gmail.com>
On 10/26/26 1:08 PM, Robert Marko wrote:
> The GCC binding names the CMN PLL inputs bias_pll_cc and
> bias_pll_nss_noc. Use those names as fw_name so GCC resolves the
> clocks through DT references.
>
> Keep the existing .name values as fallbacks for older device trees
> without these optional inputs.
>
> Signed-off-by: Robert Marko <robimarko@gmail.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
next prev parent reply other threads:[~2026-10-27 10:59 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-26 12:08 [PATCH v2 1/4] clk: qcom: ipq-cmn-pll: Correct IPQ8074 NSS NoC rate Robert Marko
2026-10-26 12:08 ` [PATCH v2 2/4] dt-bindings: clocks: qcom,gcc-ipq8074: Allow CMN PLL bias clocks Robert Marko
2026-10-26 12:08 ` [PATCH v2 3/4] clk: qcom: gcc-ipq8074: Align CMN PLL inputs with binding Robert Marko
2026-10-27 10:59 ` Konrad Dybcio [this message]
2026-10-27 11:25 ` Abel Vesa
2026-10-26 12:08 ` [PATCH v2 4/4] arm64: dts: qcom: ipq8074: Add CMN PLL Robert Marko
2026-10-27 10:59 ` Konrad Dybcio
2026-10-27 11:23 ` Abel Vesa
2026-10-27 10:58 ` [PATCH v2 1/4] clk: qcom: ipq-cmn-pll: Correct IPQ8074 NSS NoC rate Konrad Dybcio
2026-10-27 11:24 ` Abel Vesa
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