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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-77607a47601sm5176550b3a.28.2025.09.12.05.00.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 12 Sep 2025 05:00:21 -0700 (PDT) Message-ID: <335ffce5-19c6-409d-8386-686fe9e5dea5@oss.qualcomm.com> Date: Fri, 12 Sep 2025 20:00:14 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 08/13] phy: qcom: qmp-usbc: Add USB/DP switchable PHY clk register To: Dmitry Baryshkov Cc: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Rob Clark , Dmitry Baryshkov , Abhinav Kumar , Jessica Zhang , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, fange.zhang@oss.qualcomm.com, yongxing.mou@oss.qualcomm.com, li.liu@oss.qualcomm.com, tingwei.zhang@oss.qualcomm.com, Bjorn Andersson , Konrad Dybcio References: <20250911-add-displayport-support-for-qcs615-platform-v4-0-2702bdda14ed@oss.qualcomm.com> <20250911-add-displayport-support-for-qcs615-platform-v4-8-2702bdda14ed@oss.qualcomm.com> <6p43oxn57kke5eotoqtt5gqtmhmgeteoymewqm3ko5q5veyegs@krkh4dwdno5i> From: Xiangxu Yin In-Reply-To: <6p43oxn57kke5eotoqtt5gqtmhmgeteoymewqm3ko5q5veyegs@krkh4dwdno5i> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTEyMDEwNiBTYWx0ZWRfX5Q8tpbSzvNgL /drZi7fDCfhHVht0amZTF77hA7qWtJu7NJIMuLU3doQC1Cm5V65/FE6xtEzeH+NPI6vK8UxSftz UgcwV3tc5WhM9ilpr+EEUAduZyCX3uHAZr1TwvBeFdwxtb3FwEuWepjykmzWitHpRM9B6vaUKCE WC5bP4vvayUAqVhYQZvObSGu1CISBj4PW/d4ozwDgvrF30lmQ8xP9QGeXFqHyFiJHfvWmjzhA5e 47x2t5b4dFry+MoceBiBM4vxp8uss+vPbOJwv+rX/iJgGVXB6yEDsoxRL+I2jXZvsznkBcVfR8y aqK2BxJl41ZAAWDx3UO/RsasAujgBXsuGE4r8Q9YwqkXufzgHn8S23MHoGTFnQsT0PI5uqE7NVg cV98Gsrk X-Proofpoint-GUID: fUXU9ZevmjIODl96eXNDxXiRbgwCMp2O X-Authority-Analysis: v=2.4 cv=JMM7s9Kb c=1 sm=1 tr=0 ts=68c40b58 cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=EUspDBNiAAAA:8 a=kyIpQUSdGz_7SAUQDtwA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-ORIG-GUID: fUXU9ZevmjIODl96eXNDxXiRbgwCMp2O X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-12_04,2025-09-11_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 bulkscore=0 clxscore=1015 suspectscore=0 impostorscore=0 malwarescore=0 priorityscore=1501 spamscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509120106 On 9/12/2025 6:19 PM, Dmitry Baryshkov wrote: > On Thu, Sep 11, 2025 at 10:55:05PM +0800, Xiangxu Yin wrote: >> Add USB/DP switchable PHY clock registration and DT parsing for DP offsets. >> Extend qmp_usbc_register_clocks and clock provider logic to support both >> USB and DP instances. >> >> Signed-off-by: Xiangxu Yin >> --- >> drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 208 +++++++++++++++++++++++++++++-- >> 1 file changed, 195 insertions(+), 13 deletions(-) >> >> @@ -1276,8 +1291,11 @@ static int phy_pipe_clk_register(struct qmp_usbc *qmp, struct device_node *np) >> >> ret = of_property_read_string(np, "clock-output-names", &init.name); >> if (ret) { >> - dev_err(qmp->dev, "%pOFn: No clock-output-names\n", np); >> - return ret; >> + char name[64]; >> + >> + /* Clock name is not mandatory. */ >> + snprintf(name, sizeof(name), "%s::pipe_clk", dev_name(qmp->dev)); >> + init.name = name; >> } > Do we have any guarantees that memory for 'name' exists beyond this point? If the previous of_property_read_string() call succeeded, could 'name' still be empty? or you means 'char name[64]' will be release after '}'? >From local verification, I can see 88e8000.phy::pipe_clk node from clk_summary. >> >> init.ops = &clk_fixed_rate_ops; >> @@ -1286,19 +1304,176 @@ static int phy_pipe_clk_register(struct qmp_usbc *qmp, struct device_node *np) >> fixed->fixed_rate = 125000000; >> fixed->hw.init = &init; >> >> - ret = devm_clk_hw_register(qmp->dev, &fixed->hw); >> - if (ret) >> + return devm_clk_hw_register(qmp->dev, &fixed->hw); >> +} >> + >> + >> +/* >> + * Display Port PLL driver block diagram for branch clocks >> + * >> + * +------------------------------+ >> + * | DP_VCO_CLK | >> + * | | >> + * | +-------------------+ | >> + * | | (DP PLL/VCO) | | >> + * | +---------+---------+ | >> + * | v | >> + * | +----------+-----------+ | >> + * | | hsclk_divsel_clk_src | | >> + * | +----------+-----------+ | >> + * +------------------------------+ >> + * | >> + * +---------<---------v------------>----------+ >> + * | | >> + * +--------v----------------+ | >> + * | dp_phy_pll_link_clk | | >> + * | link_clk | | >> + * +--------+----------------+ | >> + * | | >> + * | | >> + * v v >> + * Input to DISPCC block | >> + * for link clk, crypto clk | >> + * and interface clock | >> + * | >> + * | >> + * +--------<------------+-----------------+---<---+ >> + * | | | >> + * +----v---------+ +--------v-----+ +--------v------+ >> + * | vco_divided | | vco_divided | | vco_divided | >> + * | _clk_src | | _clk_src | | _clk_src | >> + * | | | | | | >> + * |divsel_six | | divsel_two | | divsel_four | >> + * +-------+------+ +-----+--------+ +--------+------+ >> + * | | | >> + * v---->----------v-------------<------v >> + * | >> + * +----------+-----------------+ >> + * | dp_phy_pll_vco_div_clk | >> + * +---------+------------------+ >> + * | >> + * v >> + * Input to DISPCC block >> + * for DP pixel clock >> + * >> + */ >> +static int qmp_dp_pixel_clk_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) >> +{ >> + switch (req->rate) { >> + case 1620000000UL / 2: >> + case 2700000000UL / 2: >> + /* 5.4 and 8.1 GHz are same link rate as 2.7GHz, i.e. div 4 and div 6 */ >> + return 0; >> + default: >> + return -EINVAL; >> + } >> +} >> + >> +static unsigned long qmp_dp_pixel_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) >> +{ >> + const struct qmp_usbc *qmp; >> + const struct phy_configure_opts_dp *dp_opts; >> + >> + qmp = container_of(hw, struct qmp_usbc, dp_pixel_hw); >> + >> + dp_opts = &qmp->dp_opts; >> + >> + switch (dp_opts->link_rate) { >> + case 1620: >> + return 1620000000UL / 2; >> + case 2700: >> + return 2700000000UL / 2; >> + case 5400: >> + return 5400000000UL / 4; > No HBR3 support? Then why was it mentioned few lines above? > >> + default: >> + return 0; >> + } >> +} >> + > >> +static int qmp_usbc_register_clocks(struct qmp_usbc *qmp, struct device_node *np) >> +{ >> + int ret; >> >> - ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &fixed->hw); >> + ret = phy_pipe_clk_register(qmp, np); >> if (ret) >> return ret; >> >> - /* >> - * Roll a devm action because the clock provider is the child node, but >> - * the child node is not actually a device. >> - */ >> - return devm_add_action_or_reset(qmp->dev, phy_clk_release_provider, np); >> + if (qmp->dp_serdes != 0) { >> + ret = phy_dp_clks_register(qmp, np); >> + if (ret) >> + return ret; >> + } >> + >> + return devm_of_clk_add_hw_provider(qmp->dev, qmp_usbc_clks_hw_get, qmp); > Do you understand what did the comment (that you've removed) say? And > why? > >> } >> >> #if IS_ENABLED(CONFIG_TYPEC) >> @@ -1429,6 +1604,13 @@ static int qmp_usbc_parse_dt(struct qmp_usbc *qmp) >> if (IS_ERR(base)) >> return PTR_ERR(base); >> >> + if (offs->dp_serdes != 0) { >> + qmp->dp_serdes = base + offs->dp_serdes; >> + qmp->dp_tx = base + offs->dp_txa; >> + qmp->dp_tx2 = base + offs->dp_txb; >> + qmp->dp_dp_phy = base + offs->dp_dp_phy; >> + } >> + >> qmp->serdes = base + offs->serdes; >> qmp->pcs = base + offs->pcs; >> if (offs->pcs_misc) >> @@ -1537,7 +1719,7 @@ static int qmp_usbc_probe(struct platform_device *pdev) >> */ >> pm_runtime_forbid(dev); >> >> - ret = phy_pipe_clk_register(qmp, np); >> + ret = qmp_usbc_register_clocks(qmp, np); >> if (ret) >> goto err_node_put; >> >> >> -- >> 2.34.1 >>