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([121.160.151.7]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-82f8ec003dcsm18151031b3a.52.2026.04.22.09.05.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Apr 2026 09:05:12 -0700 (PDT) From: Chanhong Jung To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Ripard Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/2] dt-bindings: gpio: fairchild,74hc595: add registers-default property Date: Thu, 23 Apr 2026 01:05:03 +0900 Message-Id: <33d515f13769c685e6811463a14e111252a7c58d.1776872453.git.happycpu@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The 74HC595 and 74LVC594 shift registers latch their outputs until the first serial write, so boards that depend on a specific power-on pattern (for example active-low indicators, reset lines, or other signals that must come up non-zero) have no way to express that today: the Linux driver always writes zeros from its zero-initialised buffer during probe. Describe a new optional 'registers-default' property that carries a u8 array - one byte per cascaded register, in the same order used by the driver's internal buffer (first byte targets the last register in the chain). The Linux driver change that consumes this property follows. This property is already recognised by the corresponding U-Boot driver (drivers/gpio/74x164_gpio.c), so documenting it here brings the two bindings back in sync and allows boards to initialise the chain once from the bootloader DT and keep the same value after the kernel takes over. Signed-off-by: Chanhong Jung --- .../devicetree/bindings/gpio/fairchild,74hc595.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml b/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml index 23410aeca..c6221ed75 100644 --- a/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml +++ b/Documentation/devicetree/bindings/gpio/fairchild,74hc595.yaml @@ -45,6 +45,15 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 description: Number of daisy-chained shift registers + registers-default: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: + Initial state of the daisy-chained outputs, written by the driver + before the gpiochip is registered. One byte per cascaded register, + in the same order used by the driver's buffer (the first byte + targets the last register in the chain). When absent, outputs come + up zeroed. The number of entries must match 'registers-number'. + enable-gpios: description: GPIO connected to the OE (Output Enable) pin. maxItems: 1 @@ -79,6 +88,7 @@ examples: gpio-controller; #gpio-cells = <2>; registers-number = <4>; + registers-default = /bits/ 8 <0xff 0xff 0x00 0x00>; spi-max-frequency = <100000>; }; }; -- 2.34.1