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Wed, 27 Mar 2019 03:51:45 -0700 (PDT) Message-ID: <345dd7e287ed07f4a84847ff024fce237c1380a1.camel@baylibre.com> Subject: Re: [PATCH RFC 3/6] clk: meson: g12a: mark fclk_div3 as critical From: Jerome Brunet To: Neil Armstrong , khilman@baylibre.com Cc: linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Date: Wed, 27 Mar 2019 11:51:42 +0100 In-Reply-To: <20190327103308.25058-4-narmstrong@baylibre.com> References: <20190327103308.25058-1-narmstrong@baylibre.com> <20190327103308.25058-4-narmstrong@baylibre.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.30.5 (3.30.5-1.fc29) MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2019-03-27 at 11:33 +0100, Neil Armstrong wrote: > On Amlogic Meson G12b platform, the fclk_div3 seems to be necessary for > the system to operate correctly. > > Disabling it cause the entire system to freeze, including peripherals. > > This patch patch marks this clock as critical, fixing boot on G12b platforms. > > Signed-off-by: Neil Armstrong > --- > drivers/clk/meson/g12a.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c > index 03b4c78f558f..d62ebcd2162d 100644 > --- a/drivers/clk/meson/g12a.c > +++ b/drivers/clk/meson/g12a.c > @@ -1062,6 +1062,16 @@ static struct clk_fixed_factor g12a_fclk_div3_div = { > .ops = &clk_fixed_factor_ops, > .parent_names = (const char *[]){ "fixed_pll" }, > .num_parents = 1, > + /* > + * This clock is used by the resident firmware and is required > + * by the platform to operate correctly. > + * Until the following condition are met, we need this clock to > + * be marked as critical: > + * a) Mark the clock used by a firmware resource, if possible > + * b) CCF has a clock hand-off mechanism to make the sure the > + * clock stays on until the proper driver comes along > + */ > + .flags = CLK_IS_CRITICAL, The gate should be critical then, not the fixed_divider clock. the fdiv3 gate is a child of this clock, so fdiv3 should still be able to gate with this > }, > }; > > Could you CC me of the whole series next time, I prefer getting the all context.