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Thu, 2 Jul 2026 21:07:54 -0700 From: Nicolin Chen To: Will Deacon , Robin Murphy , "Joerg Roedel" , Bjorn Helgaas , "Jason Gunthorpe" CC: "Rafael J . Wysocki" , Len Brown , Pranjal Shrivastava , Mostafa Saleh , Lu Baolu , Kevin Tian , , , , , , , Shuai Xue Subject: [PATCH v5 16/18] iommu/arm-smmu-v3: Factor out CMDQ batch force-sync conditions Date: Thu, 2 Jul 2026 21:06:41 -0700 Message-ID: <3499c9990bfdfa3580abb5972c816f32d037d6f5.1783044582.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9DA:EE_|DM3PR12MB9416:EE_ X-MS-Office365-Filtering-Correlation-Id: a0f552f9-f539-4601-b038-08ded8b8b2a5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|7416014|36860700016|23010399003|1800799024|22082099003|18002099003|11063799006|56012099006; X-Microsoft-Antispam-Message-Info: WWoAu8mEJ5JgU1JAM23Fx0BVgP1MDS3J0i7BnIj6+OdYJ8yQLUFf+DCw4q7uiO2/LTSD9kZDw7XoPNnfAA/6vkjE/T+y1usOi0dIoTi6Zrr+2TqBwa+SStJhGdJHwI9B/uEEnfEKWAlBUDLLT3Mwcp1/eNCbK1N89mViOqKuGwTAwu2fkZxNTEZjMKHoINAmoqUTy5FrpM+uT+cYzOo2VouoPLmvYBHt1xLzJnIzANjmAuU5O6D5A1WS0qC9h61K9K8KN+cOF8DTe8wHldShcBZuRUkmdhq3f6CchRAsNz0tAsuVm92Ma6p1n42mia1kiETaYHInIKgE/gc95A/poLC+L+mAod7RTblb+TZ3x+x158/eCjwIpVZGwP0566EH4bqfCfgbA5VJnB4uX6Js5nkMs/lSgWnbhcW6BgSmtUOOlO0dFpuK3R1ijAPfzbWFzhFnjHINqsmXw7XgvdBv/976JgZIiOUaqP0uPF1gkiymTzIlxY7xeJgGc4355DL1KcY6v/h/cj3VvSJRjb8a85Nby22xsERkc/Vk5Cd63DiaNz+ZS4je2pG9R8A/Z/1CNPw+uXvlRsY3M52SbXYS68OhJwXKziiIti4olWmsVL1gpXLQxzHYFhkWsfDI5vNZQ2xC4iMgf62g37Zcg8TBd7tM/jD8T5INYq+IcQv+9dOuxw6DjgQz3HDbKanP5cHTvuZ9Bgl78j61UC7DBYfP+g== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(376014)(7416014)(36860700016)(23010399003)(1800799024)(22082099003)(18002099003)(11063799006)(56012099006);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: mp4xN3dzIvftL5SRKdiOc80Bp5nlbey7l6tS08ipN1wNkQxjwn/XUwJlQFBCt6sq8JHpSuGXjmIWN/8oQkIDfizlUvH/tIhEoMK7+URB5RiLqrE92yjleT29AE3QEYV2LIJ5VlkNGvfNZ6n88DSvpQvyR9FG3go02NvUCZM64aiDMERFfcoDXxYgrjSk44/IBCgyNsyomYLN6CPKJS28nSz2EguFSjKjo2j2EkxnbI4FkNwYID/ClbyY75KEfrSmTN/8UCdPb+7ho4/QoO1HeTeYeanfT6EzD9j87FiX4LQiN9Vy19igxH6uV5iTtNO1BZMte81PKQZhLr3pKU/JR5xqsyzT28HKZg4eexC7GnOIjIxrRjOQDXF25u++59KtN7D+S/oJ3NRr3onZuvTq3dVDUA1OEMWSxYdnqG3l0eMfqDvgJWnS4dr4lWApkLO9 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Jul 2026 04:08:11.4856 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a0f552f9-f539-4601-b038-08ded8b8b2a5 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9DA.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PR12MB9416 arm_smmu_cmdq_batch_add_cmd_p() carries two distinct reasons for flushing the current batch with a CMD_SYNC before appending the new command: - The batch's pre-assigned cmdq does not support the new command. - The Arm erratum 2812531 workaround (ARM_SMMU_OPT_CMDQ_FORCE_SYNC) forces a SYNC at one entry before the batch is full. Factor those checks into a new arm_smmu_cmdq_batch_force_sync() helper so that adding another force-sync condition becomes a one-line addition. No functional change. Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 23 +++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index a18a56ceeb7fb..0697bbc558d0e 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -928,16 +928,27 @@ static int arm_smmu_cmdq_batch_issue(struct arm_smmu_device *smmu, cmds->num, sync); } +static bool arm_smmu_cmdq_batch_force_sync(struct arm_smmu_device *smmu, + struct arm_smmu_cmdq_batch *cmds, + struct arm_smmu_cmd *cmd) +{ + /* The batch's pre-assigned cmdq doesn't support the new command */ + if (!arm_smmu_cmdq_supports_cmd(cmds->cmdq, cmd)) + return true; + + /* Arm erratum 2812531 */ + if (cmds->num == CMDQ_BATCH_ENTRIES - 1 && + (smmu->options & ARM_SMMU_OPT_CMDQ_FORCE_SYNC)) + return true; + + return false; +} + static void arm_smmu_cmdq_batch_add_cmd_p(struct arm_smmu_device *smmu, struct arm_smmu_cmdq_batch *cmds, struct arm_smmu_cmd *cmd) { - bool force_sync = (cmds->num == CMDQ_BATCH_ENTRIES - 1) && - (smmu->options & ARM_SMMU_OPT_CMDQ_FORCE_SYNC); - bool unsupported_cmd; - - unsupported_cmd = !arm_smmu_cmdq_supports_cmd(cmds->cmdq, cmd); - if (force_sync || unsupported_cmd) { + if (arm_smmu_cmdq_batch_force_sync(smmu, cmds, cmd)) { arm_smmu_cmdq_batch_issue(smmu, cmds, true); arm_smmu_cmdq_batch_init_cmd(smmu, cmds, cmd); } -- 2.43.0