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If a TLB invalidating > instruction is not intercepted, it will behave according to the guest's > setting of EFER.TCE as the value will be loaded on VM-Enter. Otherwise, > KVM's emulation may invalidate more TLB entries, which is perfectly fine > as the CPU is allowed to invalidate more TLB entries that it strictly > needs to. > > Advertise X86_FEATURE_TCE to userspace, and allow the guest to set > EFER.TCE if available. > > Signed-off-by: Venkatesh Srinivas > Co-developed-by: Yosry Ahmed > Signed-off-by: Yosry Ahmed I'll repeat what I said on that referenced patch. What's the point?  AMD have said that TCE doesn't exist any more; it's a bit that's no longer wired into anything. You've got to get to pre-Zen hardware before this has any behavioural effect, at which point the breath of testing is almost 0. ~Andrew