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[146.241.241.213]) by smtp.gmail.com with ESMTPSA id k7-20020aa7c047000000b0053de19620b9sm511862edo.2.2023.11.23.02.52.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Nov 2023 02:52:59 -0800 (PST) Message-ID: <35045f6ef6a5b274063186c065a8215088b94cd5.camel@redhat.com> Subject: Re: [PATCH net-next v1 3/3] net: dsa: microchip: Fix PHY loopback configuration for KSZ8794 and KSZ8873 From: Paolo Abeni To: Oleksij Rempel , "David S. Miller" , Andrew Lunn , Eric Dumazet , Florian Fainelli , Jakub Kicinski , Vladimir Oltean , Woojung Huh , Arun Ramadoss Cc: kernel@pengutronix.de, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, UNGLinuxDriver@microchip.com Date: Thu, 23 Nov 2023 11:52:57 +0100 In-Reply-To: <20231121152426.4188456-3-o.rempel@pengutronix.de> References: <20231121152426.4188456-1-o.rempel@pengutronix.de> <20231121152426.4188456-3-o.rempel@pengutronix.de> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.46.4 (3.46.4-1.fc37) MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Tue, 2023-11-21 at 16:24 +0100, Oleksij Rempel wrote: > Correct the PHY loopback bit handling in the ksz8_w_phy_bmcr and > ksz8_r_phy_bmcr functions for KSZ8794 and KSZ8873 variants in the ksz8795 > driver. Previously, the code erroneously used Bit 7 of port register 0xD > for both chip variants, which is actually for LED configuration. This > update ensures the correct registers and bits are used for the PHY > loopback feature: >=20 > - For KSZ8794: Use 0xF / Bit 7. > - For KSZ8873: Use 0xD / Bit 0. >=20 > Signed-off-by: Oleksij Rempel This looks like a bugfix, so possibly worth a Fixes tag? Given the dependency on the previous refactor, I think we can take it via net- next. @Andrew, Florian, Vladimir: do you have any specific preference here? Thanks! Paolo