From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752154AbdJaVGk (ORCPT ); Tue, 31 Oct 2017 17:06:40 -0400 Received: from bastet.se.axis.com ([195.60.68.11]:46556 "EHLO bastet.se.axis.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750928AbdJaVGi (ORCPT ); Tue, 31 Oct 2017 17:06:38 -0400 Subject: Re: [PATCH v2 06/17] PCI: designware-ep: Add generic function for raising MSI irq To: Kishon Vijay Abraham I , Jingoo Han , Joao Pinto , Bjorn Helgaas CC: , References: <20171030124221.20690-1-niklas.cassel@axis.com> <20171030124221.20690-7-niklas.cassel@axis.com> From: Niklas Cassel Message-ID: <3504bd0d-7e96-a9ac-2d9e-e0e81797eb19@axis.com> Date: Tue, 31 Oct 2017 22:06:24 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="windows-1252" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.0.5.60] X-ClientProxiedBy: XBOX03.axis.com (10.0.5.17) To XBOX02.axis.com (10.0.5.16) X-TM-AS-GCONF: 00 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/31/2017 07:22 AM, Kishon Vijay Abraham I wrote: (snip) >> --- a/drivers/pci/dwc/pcie-designware.h >> +++ b/drivers/pci/dwc/pcie-designware.h >> @@ -106,6 +106,8 @@ >> #define MSI_CAP_MME_MASK (7 << MSI_CAP_MME_SHIFT) >> #define MSI_MESSAGE_ADDR_L32 0x54 >> #define MSI_MESSAGE_ADDR_U32 0x58 >> +#define MSI_MESSAGE_DATA_32 0x58 > > Does ADDR_U32 and DATA_32 share the same offset? (in dra7xx MSI_64_EN is > hardwired to 1 so I can't know this for sure.) > Hello Kishon, Yes, they do. The information in the register depends on if the bit MSI_64_EN is set or not. There exists defines for this also in the generic uapi header pci_regs.h, however, utilizing that header would be a separate patch. $ grep -E "MSI_DATA|MSI_MASK" include/uapi/linux/pci_regs.h #define PCI_MSI_DATA_32 8 /* 16 bits of data for 32-bit devices */ #define PCI_MSI_MASK_32 12 /* Mask bits register for 32-bit devices */ #define PCI_MSI_DATA_64 12 /* 16 bits of data for 64-bit devices */ #define PCI_MSI_MASK_64 16 /* Mask bits register for 64-bit devices */ Regards, Niklas