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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: -H-fw97niq84OUEhdxFUvhVpo8k5BeA5 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNjI1MDA0MyBTYWx0ZWRfXzintr5KPtvhU fcxB9KhRVOJpkyS9zcjXjGH9AjeE8QgtCkZXUKx9TVR1xT4Vo0NfjlM9f3V23yZRrlIOfcE2/Mi Jou8Cu/PMsFkfGUa/B5Fia/7f0A2fbN+k75WzS1xh79IH98gfgByhShdI9RB39ZzkB3DMhHDivf m2B/zo3AA1wzwpLWtdUcx1QY0CJEOKC4mgUIgy8kT4tyqMpv0goW4dUcEjLTyP6FUtbvP9kKRed hBsdFwWNDdtgq2uMYjN4yXNzZo8G2rnG7eP8medptUguKy1BV4iCJ3PDB9nobkwg7MmMI+RVpNM YBi8BItgqs8rnL8HyJIpzFfc2vbrprY3aV9TI1Iu4mrW8tiqpqhw9Ea0FYrYXgXrro2I5eYeyer o9PAYDl54FbDlIvocicHEOqQ9pM+jCErwzP4mGUA8k86uGPRaEkKnYc8gWluaImEBLfJew17 X-Authority-Analysis: v=2.4 cv=caHSrmDM c=1 sm=1 tr=0 ts=685b8f6f cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=6IFa9wvqVegA:10 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=WdiEhHOlSmYA5aSgIJUA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-ORIG-GUID: -H-fw97niq84OUEhdxFUvhVpo8k5BeA5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-06-25_01,2025-06-23_07,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxlogscore=999 suspectscore=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 adultscore=0 mlxscore=0 spamscore=0 malwarescore=0 phishscore=0 clxscore=1015 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2506250043 On 6/24/2025 8:08 PM, Konrad Dybcio wrote: > On 6/24/25 11:00 AM, Kathiravan Thirumoorthy wrote: >> QUPv3 in IPQ5424 consists of six Serial Engines (SEs). Describe the >> first SE, which supports a 4-wire UART configuration suitable for >> applications such as HS-UART. >> >> Note that the required initialization for this SE is not handled by the >> bootloader. Therefore, add the SE node in the device tree but keep it >> disabled. Enable it once Linux gains support for configuring the SE, >> allowing to use in relevant RDPs. > Do you mean fw loading support? SE0 is minicore, so we don't need to load the FW. But apart from FW , protocol specific configurations to be done in the SE's Image Configuration registers, which is taken care in the patch[1] [1] [PATCH v5 0/5] Add support to load QUP SE firmware from > >> Signed-off-by: Kathiravan Thirumoorthy >> --- >> Changes in v2: >> - Correct the interrupt number >> - Link to v1: https://lore.kernel.org/r/20250624-ipq5424_hsuart-v1-1-a4e71d00fc05@oss.qualcomm.com >> --- >> arch/arm64/boot/dts/qcom/ipq5424.dtsi | 9 +++++++++ >> 1 file changed, 9 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi >> index 66bd2261eb25d79051adddef604c55f5b01e6e8b..2b8499422a8a9a2f63e1af9ae8c189bafe690514 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi >> +++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi >> @@ -417,6 +417,15 @@ qupv3: geniqup@1ac0000 { >> #address-cells = <2>; >> #size-cells = <2>; >> >> + uart0: serial@1a80000 { >> + compatible = "qcom,geni-uart"; >> + reg = <0 0x01a80000 0 0x4000>; >> + clocks = <&gcc GCC_QUPV3_UART0_CLK>; >> + clock-names = "se"; >> + interrupts = ; >> + status = "disabled"; >> + }; > I'd normally expect to see a pin configuration here as well, > especially since you mention the bootloader doesn't configure > the interface Ack. > > Konrad