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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ba4517ee077sm538493266b.18.2026.04.22.03.06.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 22 Apr 2026 03:06:30 -0700 (PDT) Message-ID: <3526a6ec-20ab-41d0-9130-8dd6d5b76f49@oss.qualcomm.com> Date: Wed, 22 Apr 2026 12:06:27 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] phy: qualcomm: qmp-combo: update DP PHY PLL programming on Glymur To: Mahadevan P , Vinod Koul , Neil Armstrong , Wesley Cheng , Abel Vesa , Dmitry Baryshkov , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Ritesh Kumar References: <20260419-glymur_dp-v1-1-ad1067a8e8ae@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260419-glymur_dp-v1-1-ad1067a8e8ae@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=OdioyBTY c=1 sm=1 tr=0 ts=69e89da8 cx=c_pps a=wEM5vcRIz55oU/E2lInRtA==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=PVKFNgOZ47auAR9NjogA:9 a=QEXdDO2ut3YA:10 a=OIgjcC2v60KrkQgK7BGD:22 X-Proofpoint-ORIG-GUID: sYbgSp_qP5Fi2b1KHKDt1MkmM_lkPpuX X-Proofpoint-GUID: sYbgSp_qP5Fi2b1KHKDt1MkmM_lkPpuX X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIyMDA5NiBTYWx0ZWRfX+vtYX8DS8L5V Do+MC53KIluGEvB9Kyzul5HRdOuUFGmWI72YMWT0uOR76IRGywWh9reqz0O8vVpeVcJ4k0he7ll 73gZOKV85qfacJMYQOR8oPslfq+Qa5/0hgLSfsBXvAasDjVZ+U1NYmZ2m+eJEafU0HwehcP8wyi HJHsCG5o0DrM7Eo49GolYD4Lc3sf1SBrT1ZvAbJCo1TIBKzafpcFifOIzLpJDbiAFljDqbZOG1z jTDWnzrap5PsmMLmRB5aNs3R3R3knVmqqKdL7JJuopddo6ON6zuwsRdLYCYSP4ejUlgZYedYUVQ stx0OIphkji89ocNTYxI5G8gUYsZ7HjUq839BcGtRwGcraGsFTDkhS+msCdN6Mmp91Va+AXK9gm 9byf7nfoHzwUk2jQh6Im6XKjg8jCMC4SucaMIv7lRIEIAAFzzGJIYz1xNTr8zQMe70UPYQO/KmQ nb5ObgsOvb81kAFoamg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-22_01,2026-04-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 impostorscore=0 malwarescore=0 phishscore=0 adultscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2604220096 On 4/19/26 12:15 PM, Mahadevan P wrote: > The existing DP PHY PLL and AUX configuration for the Glymur platform > does not fully follow the Hardware Programming Guide requirements for > DP over Type-C, which results in DP link bring-up failures. [...] > @@ -283,8 +283,8 @@ static const unsigned int qmp_v8_n3_usb43dpphy_regs_layout[QPHY_LAYOUT_SIZE] = { > [QPHY_DP_AON_TOGGLE_ENABLE] = QPHY_V8_PCS_AON_DP_AON_TOGGLE_ENABLE, > > [QPHY_COM_RESETSM_CNTRL] = QSERDES_V8_COM_RESETSM_CNTRL, > - [QPHY_COM_C_READY_STATUS] = QSERDES_V8_COM_C_READY_STATUS, > - [QPHY_COM_CMN_STATUS] = QSERDES_V8_COM_CMN_STATUS, > + [QPHY_COM_C_READY_STATUS] = QSERDES_V8_COM_C_READY_STATUS_N3, This register is in the DP_QSERDES region, not in COM. The updates to the reg addreses themselves seem to match the hw description. [...] > +static bool qmp_v8_combo_configure_dp_mode(struct qmp_combo *qmp) > +{ > + bool reverse = (qmp->orientation == TYPEC_ORIENTATION_REVERSE); > + const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts; > + u32 val; > + > + val = DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | > + DP_PHY_PD_CTL_LANE_0_1_PWRDN | DP_PHY_PD_CTL_LANE_2_3_PWRDN | > + DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN; The Hamoa (v6) HSR suggests we can use this broader value there too. And same for e.g. Makena (v4), but not sdm845 (v3) (perhaps we could use do it either way?). With my response to Dmitry's comment in mind, the diff in this function against qmp_combo_configure_dp_mode() should either be broadened to other platforms, or the function should just be the same for all targets [...] > > +static int qmp_v8_helper_configure_dp_phy(struct qmp_combo *qmp) This function would then be the same (except your v8 impl returns earlier than the existing one, skipping a 0x19 write to QSERDES_DP_PHY_CFG and QPHY_DP_PHY_STATUS reads) Konrad