From: Dave Hansen <dave.hansen@intel.com>
To: Mario Limonciello <mario.limonciello@amd.com>,
Borislav Petkov <bp@alien8.de>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
Dave Hansen <dave.hansen@linux.intel.com>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<x86@kernel.org>, "H . Peter Anvin" <hpa@zytor.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
"Gautham R . Shenoy" <gautham.shenoy@amd.com>,
Perry Yuan <perry.yuan@amd.com>,
Brijesh Singh <brijesh.singh@amd.com>,
Peter Zijlstra <peterz@infradead.org>,
Li RongQing <lirongqing@baidu.com>,
"open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<linux-kernel@vger.kernel.org>,
"open list:ACPI" <linux-acpi@vger.kernel.org>,
"open list:AMD PSTATE DRIVER" <linux-pm@vger.kernel.org>,
Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Subject: Re: [PATCH v7 09/12] x86/process: Clear hardware feedback history for AMD processors
Date: Mon, 2 Dec 2024 08:38:59 -0800 [thread overview]
Message-ID: <355c1c37-ef04-4209-8e05-66d6d295a98a@intel.com> (raw)
In-Reply-To: <20241130140703.557-10-mario.limonciello@amd.com>
On 11/30/24 06:07, Mario Limonciello wrote:
> --- a/arch/x86/kernel/process_64.c
> +++ b/arch/x86/kernel/process_64.c
> @@ -709,6 +709,10 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
> /* Load the Intel cache allocation PQR MSR. */
> resctrl_sched_in(next_p);
>
> + /* Reset hw history on AMD CPUs */
> + if (cpu_feature_enabled(X86_FEATURE_AMD_WORKLOAD_CLASS))
> + wrmsrl(AMD_WORKLOAD_HRST, 0x1);
> +
> return prev_p;
Could we do a little refactoring here, please? This, plus the
resctrl_sched_in() is sure starting to look like a pattern. It would be
nice to have a single, common function that 32-bit and 64-bit call at
the end of __switch_to().
The X86_BUG_SYSRET_SS_ATTRS hunk can probably go in there too.
next prev parent reply other threads:[~2024-12-02 16:39 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-30 14:06 [PATCH v7 00/12] Add support for AMD hardware feedback interface Mario Limonciello
2024-11-30 14:06 ` [PATCH v7 01/12] Documentation: x86: Add AMD Hardware Feedback Interface documentation Mario Limonciello
2024-12-02 11:45 ` Peter Zijlstra
2024-12-03 20:30 ` Mario Limonciello
2024-11-30 14:06 ` [PATCH v7 02/12] MAINTAINERS: Add maintainer entry for AMD Hardware Feedback Driver Mario Limonciello
2024-11-30 14:06 ` [PATCH v7 03/12] x86/msr-index: define AMD heterogeneous CPU related MSR Mario Limonciello
2024-11-30 14:06 ` [PATCH v7 04/12] platform/x86: hfi: Introduce AMD Hardware Feedback Interface Driver Mario Limonciello
2024-12-02 11:35 ` Peter Zijlstra
2024-12-03 20:27 ` Mario Limonciello
2024-12-05 9:08 ` Peter Zijlstra
2024-11-30 14:06 ` [PATCH v7 05/12] platform/x86: hfi: parse CPU core ranking data from shared memory Mario Limonciello
2024-11-30 14:06 ` [PATCH v7 06/12] platform/x86: hfi: init per-cpu scores for each class Mario Limonciello
2024-11-30 14:06 ` [PATCH v7 07/12] platform/x86: hfi: add online and offline callback support Mario Limonciello
2024-12-02 11:38 ` Peter Zijlstra
2024-12-03 20:28 ` Mario Limonciello
2024-12-05 9:09 ` Peter Zijlstra
2024-11-30 14:06 ` [PATCH v7 08/12] platform/x86: hfi: add power management callback Mario Limonciello
2024-11-30 14:07 ` [PATCH v7 09/12] x86/process: Clear hardware feedback history for AMD processors Mario Limonciello
2024-12-02 11:40 ` Peter Zijlstra
2024-12-02 15:59 ` Peter Zijlstra
2024-12-03 21:56 ` Mario Limonciello
2024-12-02 16:38 ` Dave Hansen [this message]
2024-11-30 14:07 ` [PATCH v7 10/12] cpufreq/amd-pstate: Disable preferred cores on designs with workload classification Mario Limonciello
2024-11-30 14:07 ` [PATCH v7 11/12] platform/x86/amd: hfi: Set ITMT priority from ranking data Mario Limonciello
2024-11-30 14:07 ` [PATCH v7 12/12] platform/x86/amd: hfi: Add debugfs support Mario Limonciello
2024-11-30 15:20 [PATCH v7 00/12] Add support for AMD hardware feedback interface Mario Limonciello
2024-11-30 15:20 ` [PATCH v7 09/12] x86/process: Clear hardware feedback history for AMD processors Mario Limonciello
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