From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757694AbcIXPSU (ORCPT ); Sat, 24 Sep 2016 11:18:20 -0400 Received: from mail-lf0-f67.google.com ([209.85.215.67]:33682 "EHLO mail-lf0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751693AbcIXPSS (ORCPT ); Sat, 24 Sep 2016 11:18:18 -0400 Subject: Re: [PATCH v3] gpio: Added zynq specific check for special pins on bank zero To: Nava kishore Manne , linus.walleij@linaro.org, gnurou@gmail.com, michal.simek@xilinx.com, soren.brinkmann@xilinx.com, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <1474630018-9986-1-git-send-email-navam@xilinx.com> Cc: Nava kishore Manne From: =?UTF-8?B?VmVzYSBKw6TDpHNrZWzDpGluZW4=?= Message-ID: <355c3a93-0f7d-adc1-224e-ac48afacbcb9@gmail.com> Date: Sat, 24 Sep 2016 18:18:13 +0300 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.12; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: <1474630018-9986-1-git-send-email-navam@xilinx.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 23/09/2016 14.26, Nava kishore Manne wrote: > From: Nava kishore Manne > > This patch adds zynq specific check for bank 0 pins 7 and 8 > are special and cannot be used as inputs > > Signed-off-by: Nava kishore Manne > Reported-by: Jonas Karlsson > Acked-by: Sören Brinkmann > Acked-by: Michal Simek > --- > Changes for v3: > -Fixed some minor comments. > Changes for v2: > -Removed un-used quirks for zynqmp. > > drivers/gpio/gpio-zynq.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c > index e72794e..6b4d10d 100644 > --- a/drivers/gpio/gpio-zynq.c > +++ b/drivers/gpio/gpio-zynq.c > @@ -96,6 +96,9 @@ > /* GPIO upper 16 bit mask */ > #define ZYNQ_GPIO_UPPER_MASK 0xFFFF0000 > > +/* For GPIO quirks */ > +#define ZYNQ_GPIO_QUIRK_FOO BIT(0) Should this be a bit more descriptive than FOO?