From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F488C4332F for ; Thu, 20 Oct 2022 11:23:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231332AbiJTLX0 (ORCPT ); Thu, 20 Oct 2022 07:23:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34876 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231318AbiJTLXT (ORCPT ); Thu, 20 Oct 2022 07:23:19 -0400 Received: from mail.ispras.ru (mail.ispras.ru [83.149.199.84]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C1647C5096; Thu, 20 Oct 2022 04:23:18 -0700 (PDT) Received: from mail.ispras.ru (unknown [83.149.199.84]) by mail.ispras.ru (Postfix) with ESMTPSA id CD5F2419E9C7; Thu, 20 Oct 2022 11:23:16 +0000 (UTC) DKIM-Filter: OpenDKIM Filter v2.11.0 mail.ispras.ru CD5F2419E9C7 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ispras.ru; s=default; t=1666264996; bh=JSJsZe6/71Z81WHPKaHYPDomkrzHejx2StTWNfL7FaA=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=CO7qefBXOON0y0sUSW5zZ/L19hjPwUJewa5YGxft6oZGUHTBHrykxzgid6P6A1/0s NtgOqwGtrOZIzjPxvyBW5HpfwL7R6yblFNAVkDbSBTiNOBOmggH+5fu7zE3l4CTCVJ nZJI0mtNwSAX2tR/gMcpurkz/az+2WHZI9DazG2w= MIME-Version: 1.0 Date: Thu, 20 Oct 2022 14:23:16 +0300 From: Evgeniy Baskov To: Ard Biesheuvel Cc: Borislav Petkov , Andy Lutomirski , Dave Hansen , Ingo Molnar , Peter Zijlstra , Thomas Gleixner , Alexey Khoroshilov , lvc-project@linuxtesting.org, x86@kernel.org, linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org Subject: Re: [PATCH 03/16] x86/boot: Set cr0 to known state in trampoline In-Reply-To: References: User-Agent: Roundcube Webmail/1.4.4 Message-ID: <3591ec1f2195095effd08e11fe45986b@ispras.ru> X-Sender: baskov@ispras.ru Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2022-10-19 10:06, Ard Biesheuvel wrote: > On Tue, 6 Sept 2022 at 12:41, Evgeniy Baskov wrote: >> >> Ensure WP bit to be set to prevent boot code from writing to >> non-writable memory pages. >> >> Signed-off-by: Evgeniy Baskov >> --- >> arch/x86/boot/compressed/head_64.S | 5 ++--- >> 1 file changed, 2 insertions(+), 3 deletions(-) >> >> diff --git a/arch/x86/boot/compressed/head_64.S >> b/arch/x86/boot/compressed/head_64.S >> index d33f060900d2..5273367283b7 100644 >> --- a/arch/x86/boot/compressed/head_64.S >> +++ b/arch/x86/boot/compressed/head_64.S >> @@ -619,9 +619,8 @@ SYM_CODE_START(trampoline_32bit_src) >> /* Set up new stack */ >> leal TRAMPOLINE_32BIT_STACK_END(%ecx), %esp >> >> - /* Disable paging */ >> - movl %cr0, %eax >> - btrl $X86_CR0_PG_BIT, %eax > > Why do we no longer care about CR0's prior value? I think we don't need to preserve any of those flags (we nether use floating point instructions nor call EFI functions with this cr0 value) and it's better to set cr0 to the well-known state. CR0 is also being set to the constant value while switching from protected to long mode, so it is already done in one of the code paths. If I am missing something, let me know, I will change it to only set WP and clear PG. > >> + /* Disable paging and setup CR0 */ >> + movl $(CR0_STATE & ~X86_CR0_PG), %eax >> movl %eax, %cr0 >> >> /* Check what paging mode we want to be in after the >> trampoline */ >> -- >> 2.35.1 >>