From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755179AbaJ2Fv0 (ORCPT ); Wed, 29 Oct 2014 01:51:26 -0400 Received: from cnbjrel02.sonyericsson.com ([219.141.167.166]:19367 "EHLO cnbjrel02.sonyericsson.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752972AbaJ2FvZ (ORCPT ); Wed, 29 Oct 2014 01:51:25 -0400 From: "Wang, Yalin" To: "'Rob Herring'" , "'Joe Perches'" , "'Russell King - ARM Linux'" , "'Will Deacon'" , "'linux-kernel@vger.kernel.org'" , "'akinobu.mita@gmail.com'" , "'linux-mm@kvack.org'" , "'linux-arm-kernel@lists.infradead.org'" Date: Wed, 29 Oct 2014 13:51:17 +0800 Subject: [RFC V5 2/3] arm:add bitrev.h file to support rbit instruction Thread-Topic: [RFC V5 2/3] arm:add bitrev.h file to support rbit instruction Thread-Index: Ac/zKGffEmlPWtUCT7yIK/xKLtVDxQADp3GQAAAMGlAAAAxPoAABDRrgAAArD0A= Message-ID: <35FD53F367049845BC99AC72306C23D103E010D18265@CNBJMBX05.corpusers.net> References: <35FD53F367049845BC99AC72306C23D103E010D18254@CNBJMBX05.corpusers.net> <35FD53F367049845BC99AC72306C23D103E010D18257@CNBJMBX05.corpusers.net> <1414392371.8884.2.camel@perches.com> <35FD53F367049845BC99AC72306C23D103E010D1825F@CNBJMBX05.corpusers.net> <35FD53F367049845BC99AC72306C23D103E010D18260@CNBJMBX05.corpusers.net> <35FD53F367049845BC99AC72306C23D103E010D18261@CNBJMBX05.corpusers.net> <35FD53F367049845BC99AC72306C23D103E010D18264@CNBJMBX05.corpusers.net> In-Reply-To: <35FD53F367049845BC99AC72306C23D103E010D18264@CNBJMBX05.corpusers.net> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: acceptlanguage: en-US Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by nfs id s9T5pV6q032667 This patch add bitrev.h file to support rbit instruction, so that we can do bitrev operation by hardware. Signed-off-by: Yalin Wang --- arch/arm/Kconfig | 1 + arch/arm/include/asm/bitrev.h | 28 ++++++++++++++++++++++++++++ 2 files changed, 29 insertions(+) create mode 100644 arch/arm/include/asm/bitrev.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 89c4b5c..be92b3b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -28,6 +28,7 @@ config ARM select HANDLE_DOMAIN_IRQ select HARDIRQS_SW_RESEND select HAVE_ARCH_AUDITSYSCALL if (AEABI && !OABI_COMPAT) + select HAVE_ARCH_BITREVERSE if (CPU_V7M || CPU_V7) select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL select HAVE_ARCH_KGDB select HAVE_ARCH_SECCOMP_FILTER if (AEABI && !OABI_COMPAT) diff --git a/arch/arm/include/asm/bitrev.h b/arch/arm/include/asm/bitrev.h new file mode 100644 index 0000000..c21a5f4 --- /dev/null +++ b/arch/arm/include/asm/bitrev.h @@ -0,0 +1,28 @@ +#ifndef __ASM_ARM_BITREV_H +#define __ASM_ARM_BITREV_H + +static __always_inline __attribute_const__ u32 __arch_bitrev32(u32 x) +{ + if (__builtin_constant_p(x)) { + x = (x >> 16) | (x << 16); + x = ((x & 0xFF00FF00) >> 8) | ((x & 0x00FF00FF) << 8); + x = ((x & 0xF0F0F0F0) >> 4) | ((x & 0x0F0F0F0F) << 4); + x = ((x & 0xCCCCCCCC) >> 2) | ((x & 0x33333333) << 2); + return ((x & 0xAAAAAAAA) >> 1) | ((x & 0x55555555) << 1); + } + __asm__ ("rbit %0, %1" : "=r" (x) : "r" (x)); + return x; +} + +static __always_inline __attribute_const__ u16 __arch_bitrev16(u16 x) +{ + return __arch_bitrev32((u32)x) >> 16; +} + +static __always_inline __attribute_const__ u8 __arch_bitrev8(u8 x) +{ + return __arch_bitrev32((u32)x) >> 24; +} + +#endif + -- 2.1.1 {.n++%ݶw{.n+{G{ayʇڙ,jfhz_(階ݢj"mG?&~iOzv^m ?I