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From: Icenowy Zheng <zhengxingda@iscas.ac.cn>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>
Cc: David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	 dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] drm/verisilicon: set blend mode for the primary plane
Date: Thu, 10 Sep 2026 15:09:13 +0800	[thread overview]
Message-ID: <35cf76a67f7473d5ef86d01c812d680abc41687e.camel@iscas.ac.cn> (raw)
In-Reply-To: <20260901171703.1161592-1-zhengxingda@iscas.ac.cn>

在 2026-09-02三的 01:17 +0800,Icenowy Zheng写道:
> Blend modes are now required to expose pixel formats w/ alpha.
> 
> As it's the primary plane and blending is explicitly disabled, just
> expose PIXEL_NONE blend mode.

Gently ping for reviews.

Thanks,
Icenowy

> 
> Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn>
> ---
>  drivers/gpu/drm/verisilicon/vs_primary_plane.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/verisilicon/vs_primary_plane.c
> b/drivers/gpu/drm/verisilicon/vs_primary_plane.c
> index 1f2be41ae496c..8d58682d88ef8 100644
> --- a/drivers/gpu/drm/verisilicon/vs_primary_plane.c
> +++ b/drivers/gpu/drm/verisilicon/vs_primary_plane.c
> @@ -7,6 +7,7 @@
>  
>  #include <drm/drm_atomic.h>
>  #include <drm/drm_atomic_helper.h>
> +#include <drm/drm_blend.h>
>  #include <drm/drm_crtc.h>
>  #include <drm/drm_fourcc.h>
>  #include <drm/drm_framebuffer.h>
> @@ -179,5 +180,7 @@ struct drm_plane *vs_primary_plane_init(struct
> drm_device *drm_dev, struct vs_dc
>  
>  	drm_plane_helper_add(plane, &vs_primary_plane_helper_funcs);
>  
> +	drm_plane_create_blend_mode_property(plane,
> +					    
> BIT(DRM_MODE_BLEND_PIXEL_NONE));
>  	return plane;
>  }


  parent reply	other threads:[~2026-09-10  7:09 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-01 17:17 Icenowy Zheng
2026-09-01 17:17 ` [PATCH 2/2] drm/verisilicon: set blend mode for the cursor plane Icenowy Zheng
2026-09-10  8:50   ` Thomas Zimmermann
2026-09-10  7:09 ` Icenowy Zheng [this message]
2026-09-10  7:58   ` [PATCH 1/2] drm/verisilicon: set blend mode for the primary plane Thomas Zimmermann
2026-09-10  8:00     ` Icenowy Zheng
2026-09-10  8:31       ` Thomas Zimmermann
2026-09-10  8:42         ` Icenowy Zheng
2026-09-10  8:45         ` Icenowy Zheng
2026-09-10  8:56           ` Thomas Zimmermann
2026-09-10  9:02             ` Icenowy Zheng
2026-09-10  9:11               ` Thomas Zimmermann
2026-09-10  8:49 ` Thomas Zimmermann
2026-09-10  9:08   ` Icenowy Zheng
2026-09-10 10:39     ` Thomas Zimmermann

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