From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx.nabladev.com (mx.nabladev.com [178.251.229.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8AB9A2C21D0; Tue, 19 May 2026 03:59:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=178.251.229.89 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779163187; cv=none; b=ClusmCL7KZ32eqZaoVaHvSntTam0bm0+BmLLJaInUGhOYMudkrrbwFulrAZTXO4WqKMoeiYvDCU/bEVtoDdGlKCZnjNcbVxWFwFaG+yDkHZrey5hCjyY4cM8ZXIyE065ou3d9lLh8H48Bx99aSZzgwwJNP1lHaewqK+wem1lmVc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779163187; c=relaxed/simple; bh=+EKhPB0op5eF5whcf6k/JmiCiY0qlQfP4Onm0LgaO8M=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=gVlChDCmiUasr+wnzy4wsngimFsyyxGFKxdzjx/cQISaZE8RlyLjoFYMggiXelNd8mkCqfUOJkFbZem2wGDFFLDdLi71b/6oPfIftwhqjqaXcE62v0zaGIx/WJZS6xx4eN6pA7f2NAB9LLtpTtXXdohsoW6TwthHXNrrgsIO4WY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nabladev.com; spf=pass smtp.mailfrom=nabladev.com; dkim=pass (2048-bit key) header.d=nabladev.com header.i=@nabladev.com header.b=ZBeiXxko; arc=none smtp.client-ip=178.251.229.89 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nabladev.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nabladev.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=nabladev.com header.i=@nabladev.com header.b="ZBeiXxko" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 23CA9114613; Tue, 19 May 2026 05:59:35 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nabladev.com; s=dkim; t=1779163177; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:content-language:in-reply-to:references; bh=qmJs5US+/rH1nCX4Uj+ki/3ilrQeeUX3cODn7cVnq6I=; b=ZBeiXxkoe3MwzbN4QzNb8Eb9xugzS8GPyEK7WQWBkjDNZe2mfu0jkeUSZYAG+XKIVniVZV 2aej5YRxjO7O24qdPNDM0HXlb+pTPg8wDOkxfN91/YkemZ9uUqamDG6zS7HK1CKHEUC/Wu LFv3pvOn6Ut/gZ6Uf6HUjOCK0hnZIgWv01XHXGsqYpTpnzBNaI8cbDhtsHErU1N5wICHjE Hw58TSARxvJG8DaikNCXHgc2K22FrVMl2VLmBDkgXWuazAAgAymA7uzq99tCdiqfDVmrs1 eaYzvqZUujAHpGfNJkZ6uiUaBZUbXTKbmAvIMdhwkc+tdTbEZGiVdCUR9KrbJQ== Message-ID: <3612f5f6-eeca-49e5-9662-72729bb48c9f@nabladev.com> Date: Mon, 18 May 2026 21:20:36 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] gpio: shared: make the voting mechanism adaptable To: Bartosz Golaszewski , Arnd Bergmann , Bartosz Golaszewski , Greg Kroah-Hartman , Srinivas Kandagatla , Linus Walleij Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org References: <20260513-gpio-shared-dynamic-voting-v1-1-8e1c49961b7d@oss.qualcomm.com> Content-Language: en-US From: Marek Vasut In-Reply-To: <20260513-gpio-shared-dynamic-voting-v1-1-8e1c49961b7d@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Last-TLS-Session-Version: TLSv1.3 On 5/13/26 11:13 AM, Bartosz Golaszewski wrote: > The current voting mechanism in GPIO shared proxy assumes that "low" is > always the default value and users can only vote for driving the GPIO > "high" in which case it will remain high as long as there's at least one > user voting. > > This makes it impossible to use the automatic sharing management for > certain use-cases such as the write-protect GPIOs of EEPROMs which are > requested "high" and driven "low" to enable writing. In this case, if > the WP GPIO is shared by multiple EEPROMs, and at least one of them > wants to enable writing, the pin must be set to "low". > > Modify the voting heuristic to assume the value set by the first user on > request to be the "default" and subseqent calls to gpiod_set_value() > will constitute votes for a change of the value to the opposite. In the > wp-gpios case it will mean that the nvmem core requests the GPIO as > "out-high" for all EEPROMs sharing the pin, and when one of them wants > to write, the pin will be driven low, enabling it. Shouldn't this polarity inversion be handled by DT GPIO_ACTIVE_* flag ? > Fixes: e992d54c6f97 ("gpio: shared-proxy: implement the shared GPIO proxy driver") > Reported-by: Marek Vasut > Closes: https://lore.kernel.org/all/20260511163518.51104-1-marex@nabladev.com/ > Signed-off-by: Bartosz Golaszewski > --- > Hi Marek! > > Please see if you can make your setup work with shared GPIOs with this > patch. You need to enable CONFIG_HAVE_SHARED_GPIOS on your platform. Why can this shared GPIO not be enabled generically for any GPIO controller ? [...]