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From: Krzysztof Kozlowski <krzk@kernel.org>
To: Christian Marangi <ansuelsmth@gmail.com>
Cc: Vinod Koul <vkoul@kernel.org>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 1/3] dt-bindings: phy: airoha: Document support for AN7583 USB PHY
Date: Wed, 16 Sep 2026 17:00:09 +0200	[thread overview]
Message-ID: <364fac74-f28f-4aed-8e83-1125a7bfb3ef@kernel.org> (raw)
In-Reply-To: <6a9e7d3b.0f5dc47b.330412.df04@mx.google.com>

On 07/09/2026 11:00, Christian Marangi wrote:
> On Mon, Sep 07, 2026 at 08:35:56AM +0200, Krzysztof Kozlowski wrote:
>>> +
>>> +    required:
>>> +      - phys
>>> +      - '#phy-cells'
>>> +
>>> +    additionalProperties: false
>>> +
>>> +patternProperties:
>>> +  '^usb2-phy@[0-9a-f]+$':
>>
>> You should not mix MMIO and non-MMIO children. Either children have
>> distinctive addressing, or not. Not both.
>>
>> The other problem is that your children have no resources, so are not
>> really distinctive children and should be folded in to the parent.
>>
>> I already asked that at v2, so let's finish with asking: drop the
>> children.
>>
> 
> I misunderstood the request and tought it was only related to the PCIe
> part.
> 
> I'm not really sure how to drop the child without complicating the node
> structure a lot (also I feel dropping the child would make the description
> of the HW less clear and I would like to prevent that)
> 
> The register for the usb2 node 0x0 and 0x1000 are offset of the register
> declared in the parent node 0x1fac0000. For usb2 1 the phy registers are at 
> 0x1fac0000 - 0x1fac0200, for usb2 2 the phy register are at
> 0x1fac1000 - 0x1fac1200.

0x1fac0000 - 0x1fac0200 and 0xx1fac1000 - 0x1fac1200 are both already
within the parent (which is: 0x1fac0000 0x1200), so I do not understand
your explanation how this would complicate anything.

> 
> The driver read this offset and apply it to every register access for the
> related phy.
> 
> The usb2 child are needed for the specific airoha,usb2-monitor-clk-sel
> property since it's specific for the usb 2.0 phy.
> 
> Also would like to stress that these PHY are all part of the same register
> block.
> 
> One solution might be to just classify the usb2 node as 0x0 and 0x1 and
> handle internally the register mapping with the driver. But again the
> problematic thing is map the monitor-clk-sel with the relevant USB 2.0 phy.
> 
> Any hint on this? Is it ok to keep the child node and use 0x0 and 0x1?

Best regards,
Krzysztof

  reply	other threads:[~2026-09-16 15:00 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-01 12:39 [PATCH v4 0/3] phy: Add support for Airoha " Christian Marangi
2026-09-01 12:39 ` [PATCH v4 1/3] dt-bindings: phy: airoha: Document support for " Christian Marangi
2026-09-07  6:35   ` Krzysztof Kozlowski
2026-09-07  9:00     ` Christian Marangi
2026-09-16 15:00       ` Krzysztof Kozlowski [this message]
2026-09-01 12:39 ` [PATCH v4 2/3] dt-bindings: phy: airoha: Document support for AN7583 Gen2 PCIe PHY Christian Marangi
2026-09-01 12:39 ` [PATCH v4 3/3] phy: airoha: Add support for Airoha AN7583 USB PHY Christian Marangi
2026-09-16 14:00   ` Zhengping Zhang

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