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From: Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>
To: Deepa Guthyappa Madivalara <deepa.madivalara@oss.qualcomm.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Vikash Garodia <vikash.garodia@oss.qualcomm.com>,
	Abhinav Kumar <abhinav.kumar@linux.dev>,
	Bryan O'Donoghue <bod@kernel.org>
Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, kernel test robot <lkp@intel.com>
Subject: Re: [PATCH v2 5/5] media: iris: Add internal buffer calculation for AV1 decoder
Date: Mon, 27 Oct 2025 14:37:59 +0530	[thread overview]
Message-ID: <36543c8c-5a69-56ed-7d96-a3f5d7396b89@oss.qualcomm.com> (raw)
In-Reply-To: <20251017-av1_irisdecoder-v2-5-964a5478139e@oss.qualcomm.com>



On 10/18/2025 12:05 AM, Deepa Guthyappa Madivalara wrote:
> Implement internal buffer count and size calculations for AV1 decoder
> for all the buffer types required by the AV1 decoder, including BIN,
> COMV, PERSIST, LINE, and PARTIAL.
> 
> This ensures the hardware decoder has properly allocated memory for AV1
> decoding operations, enabling correct AV1 video playback.
> 
> Signed-off-by: Deepa Guthyappa Madivalara <deepa.madivalara@oss.qualcomm.com>
> ---
>  drivers/media/platform/qcom/iris/iris_buffer.h     |   1 +
>  drivers/media/platform/qcom/iris/iris_vpu_buffer.c | 298 ++++++++++++++++++++-
>  drivers/media/platform/qcom/iris/iris_vpu_buffer.h | 116 ++++++++
>  3 files changed, 411 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/media/platform/qcom/iris/iris_buffer.h b/drivers/media/platform/qcom/iris/iris_buffer.h
> index 5ef365d9236c7cbdee24a4614789b3191881968b..75bb767761824c4c02e0df9b765896cc093be333 100644
> --- a/drivers/media/platform/qcom/iris/iris_buffer.h
> +++ b/drivers/media/platform/qcom/iris/iris_buffer.h
> @@ -27,6 +27,7 @@ struct iris_inst;
>   * @BUF_SCRATCH_1: buffer to store decoding/encoding context data for HW
>   * @BUF_SCRATCH_2: buffer to store encoding context data for HW
>   * @BUF_VPSS: buffer to store VPSS context data for HW
> + * @BUF_PARTIAL: buffer for AV1 IBC data
>   * @BUF_TYPE_MAX: max buffer types
>   */
>  enum iris_buffer_type {
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c
> index 4463be05ce165adef6b152eb0c155d2e6a7b3c36..e03ae7cfc9551dd2450b27d5d19ef1d23bba4c99 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c
> +++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c
> @@ -9,6 +9,17 @@
>  #include "iris_hfi_gen2_defines.h"
>  

<snip>

>  static u32 iris_vpu_dec_bin_size(struct iris_inst *inst)
>  {
>  	u32 num_vpp_pipes = inst->core->iris_platform_data->num_vpp_pipe;
> @@ -472,6 +718,8 @@ static u32 iris_vpu_dec_bin_size(struct iris_inst *inst)
>  		return hfi_buffer_bin_h265d(width, height, num_vpp_pipes);
>  	else if (inst->codec == V4L2_PIX_FMT_VP9)
>  		return hfi_buffer_bin_vp9d(width, height, num_vpp_pipes);
> +	else if (inst->codec == V4L2_PIX_FMT_AV1)
> +		return hfi_buffer_bin_av1d(width, height, num_vpp_pipes);
>  
>  	return 0;
>  }
> @@ -487,18 +735,33 @@ static u32 iris_vpu_dec_comv_size(struct iris_inst *inst)
>  		return hfi_buffer_comv_h264d(width, height, num_comv);
>  	else if (inst->codec == V4L2_PIX_FMT_HEVC)
>  		return hfi_buffer_comv_h265d(width, height, num_comv);
> -
> +	else if (inst->codec == V4L2_PIX_FMT_AV1) {
> +		if (inst->fw_caps[DRAP].value)
> +			return 0;
> +		else
> +			return hfi_buffer_comv_av1d(width, height, num_comv);
> +	}

newline is required before return.

>  	return 0;
>  }
>  

<snip>

> +static u32 iris_vpu_dec_partial_size(struct iris_inst *inst)
> +{
> +	struct v4l2_format *f = inst->fmt_src;
> +	u32 height = f->fmt.pix_mp.height;
> +	u32 width = f->fmt.pix_mp.width;
> +
> +	return hfi_buffer_ibc_av1d(width, height);
> +}
> +
>  static inline
>  u32 hfi_buffer_comv_enc(u32 frame_width, u32 frame_height, u32 lcu_size,
>  			u32 num_recon, u32 standard)
> @@ -1414,7 +1688,9 @@ static int output_min_count(struct iris_inst *inst)
>  
>  	/* fw_min_count > 0 indicates reconfig event has already arrived */
>  	if (inst->fw_min_count) {
> -		if (iris_split_mode_enabled(inst) && inst->codec == V4L2_PIX_FMT_VP9)
> +		if (iris_split_mode_enabled(inst) &&
> +		    (inst->codec == V4L2_PIX_FMT_VP9 ||
> +		     inst->codec == V4L2_PIX_FMT_VP9))

This change doesn't make any sense, do you mean V4L2_PIX_FMT_AV1?

>  			return min_t(u32, 4, inst->fw_min_count);
>  		else
>  			return inst->fw_min_count;
> @@ -1422,6 +1698,8 @@ static int output_min_count(struct iris_inst *inst)
>  
>  	if (inst->codec == V4L2_PIX_FMT_VP9)
>  		output_min_count = 9;
> +	else if (inst->codec == V4L2_PIX_FMT_AV1)
> +		output_min_count = 11;
>  
>  	return output_min_count;
>  }
> @@ -1444,6 +1722,7 @@ u32 iris_vpu_buf_size(struct iris_inst *inst, enum iris_buffer_type buffer_type)
>  		{BUF_PERSIST,     iris_vpu_dec_persist_size         },
>  		{BUF_DPB,         iris_vpu_dec_dpb_size             },
>  		{BUF_SCRATCH_1,   iris_vpu_dec_scratch1_size        },
> +		{BUF_PARTIAL,     iris_vpu_dec_partial_size         },
>  	};
>  

  reply	other threads:[~2025-10-27  9:08 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-17 18:35 [PATCH v2 0/5] Enable support for AV1 stateful decoder Deepa Guthyappa Madivalara
2025-10-17 18:35 ` [PATCH v2 1/5] media: uapi: videodev2: Add " Deepa Guthyappa Madivalara
2025-10-17 20:01   ` Nicolas Dufresne
2025-10-20 21:55     ` Deepa Guthyappa Madivalara
2025-10-17 18:35 ` [PATCH v2 2/5] media: v4l2: Add description for V4L2_PIX_FMT_AV1 in v4l_fill_fmtdesc() Deepa Guthyappa Madivalara
2025-10-17 20:02   ` Nicolas Dufresne
2025-10-17 18:35 ` [PATCH v2 3/5] media: iris: Add support for AV1 format in iris decoder Deepa Guthyappa Madivalara
2025-10-27  6:04   ` Dikshita Agarwal
2025-10-17 18:35 ` [PATCH v2 4/5] media: iris: Define AV1-specific platform capabilities and properties Deepa Guthyappa Madivalara
2025-10-27  9:07   ` Dikshita Agarwal
2025-10-29  2:46     ` Deepa Guthyappa Madivalara
2025-10-17 18:35 ` [PATCH v2 5/5] media: iris: Add internal buffer calculation for AV1 decoder Deepa Guthyappa Madivalara
2025-10-27  9:07   ` Dikshita Agarwal [this message]
2025-10-29  2:56     ` Deepa Guthyappa Madivalara

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