From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A54FC433F5 for ; Thu, 28 Apr 2022 12:10:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346035AbiD1MOE (ORCPT ); Thu, 28 Apr 2022 08:14:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50116 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345829AbiD1MOB (ORCPT ); Thu, 28 Apr 2022 08:14:01 -0400 Received: from szxga01-in.huawei.com (szxga01-in.huawei.com [45.249.212.187]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9C00B97BA5 for ; Thu, 28 Apr 2022 05:10:45 -0700 (PDT) Received: from dggpemm500022.china.huawei.com (unknown [172.30.72.56]) by szxga01-in.huawei.com (SkyGuard) with ESMTP id 4KpvZr427hzhYnK; Thu, 28 Apr 2022 20:10:28 +0800 (CST) Received: from dggpemm500006.china.huawei.com (7.185.36.236) by dggpemm500022.china.huawei.com (7.185.36.162) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 28 Apr 2022 20:10:43 +0800 Received: from [10.174.178.55] (10.174.178.55) by dggpemm500006.china.huawei.com (7.185.36.236) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.24; Thu, 28 Apr 2022 20:10:42 +0800 Subject: Re: [PATCH v2] arm64: add the printing of tpidr_elx in __show_regs() From: "Leizhen (ThunderTown)" To: Will Deacon CC: Catalin Marinas , , , "James Morse" References: <20220316062408.1113-1-thunder.leizhen@huawei.com> <20220428102156.GA14123@willie-the-truck> <4c956c17-6e13-37a1-7da3-b2c8243c2c01@huawei.com> Message-ID: <367e3bda-1541-2f9c-5b63-9820f03041e6@huawei.com> Date: Thu, 28 Apr 2022 20:10:42 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.174.178.55] X-ClientProxiedBy: dggems706-chm.china.huawei.com (10.3.19.183) To dggpemm500006.china.huawei.com (7.185.36.236) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2022/4/28 20:03, Leizhen (ThunderTown) wrote: > > > On 2022/4/28 19:07, Leizhen (ThunderTown) wrote: >> >> >> On 2022/4/28 18:21, Will Deacon wrote: >>> On Wed, Mar 16, 2022 at 02:24:08PM +0800, Zhen Lei wrote: >>>> Commit 7158627686f0 ("arm64: percpu: implement optimised pcpu access >>>> using tpidr_el1") and commit 6d99b68933fb ("arm64: alternatives: use >>>> tpidr_el2 on VHE hosts") use tpidr_elx to cache my_cpu_offset to optimize >>>> pcpu access. However, when performing reverse execution based on the >>>> registers and the memory contents in kdump, this information is sometimes >>>> required if there is a pcpu access. >>>> >>>> Signed-off-by: Zhen Lei >>>> --- >>>> arch/arm64/kernel/process.c | 11 +++++++++++ >>>> 1 file changed, 11 insertions(+) >>>> >>>> v1 --> v2: >>>> Directly print the tpidr_elx register of the current exception level. >>>> Avoid coupling with the implementation of 'my_cpu_offset'. >>>> >>>> diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c >>>> index 5369e649fa79ff8..738932e6fa4e947 100644 >>>> --- a/arch/arm64/kernel/process.c >>>> +++ b/arch/arm64/kernel/process.c >>>> @@ -216,6 +216,17 @@ void __show_regs(struct pt_regs *regs) >>>> show_regs_print_info(KERN_DEFAULT); >>>> print_pstate(regs); >>>> >>>> + switch (read_sysreg(CurrentEL)) { >>> >>> This should use is_kernel_in_hyp_mode() to detect if we're running at El2. > > static inline bool is_kernel_in_hyp_mode(void) > { > return read_sysreg(CurrentEL) == CurrentEL_EL2; > } > > I think it's more intuitive to use "switch (read_sysreg(CurrentEL))". > >>> >>>> + case CurrentEL_EL1: >>>> + printk("tpidr_el1 : %016llx\n", read_sysreg(TPIDR_EL1)); >>>> + break; >>>> + case CurrentEL_EL2: >>>> + printk("tpidr_el2 : %016llx\n", read_sysreg(TPIDR_EL2)); >>>> + break; >>>> + default: >>>> + break; >>>> + } >>> >>> I think this path can be triggered directly from usermode, so we really >>> shouldn't be printing raw kernel virtual addresses here. >> >> I run echo c > /proc/sysrq-trigger and didn't trigger this path, but maybe >> there's another way. Analysis from the other side, except for the instruction >> address, all generic registers r0-r31 is output as raw. There's also an >> opportunity to contain the instruction address. > > On second thought, there seemed to be nothing wrong with it. The user need > to have capable() first. Then the address of the perpcu memory is not static, Sorry, __my_cpu_offset is just an offset. > the memory is dynamically allocated, exposing it is no different than exposing sp. > >> >> So how about: >> + if (oops_in_progress) >> + printk("tpidr : %016lx\n", __my_cpu_offset); >> >>> >>> Will >>> . >>> >> > -- Regards, Zhen Lei