Re: [PATCH] arm64: dts: qcom: c630: Define eDP bridge and panel

[Steev Klimaszewski <steev@kali.org>]

On 11/27/20 9:42 PM, Bjorn Andersson wrote:
> The Lenovo Yoga C630 drives the Boe NV133FHM-N61 eDP display from DSI
> using a TI SN65DSI86 bridge chip on I2C 10. Define the bridge and eDP
> panel and enable the display blocks.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> ---
>  .../boot/dts/qcom/sdm850-lenovo-yoga-c630.dts | 100 ++++++++++++++++++
>  1 file changed, 100 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
> index f956dbf664c1..bdd5d92ee6c3 100644
> --- a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
> +++ b/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts
> @@ -44,6 +44,26 @@ mode {
>  			linux,code = <SW_TABLET_MODE>;
>  		};
>  	};
> +
> +	panel {
> +		compatible = "boe,nv133fhm-n61";
> +		no-hpd;
> +
> +		ports {
> +			port {
> +				panel_in_edp: endpoint {
> +					remote-endpoint = <&sn65dsi86_out>;
> +				};
> +			};
> +		};
> +	};
> +
> +	sn65dsi86_refclk: sn65dsi86-refclk {
> +		compatible = "fixed-clock";
> +		#clock-cells = <0>;
> +
> +		clock-frequency = <19200000>;
> +	};
>  };
>  
>  &adsp_pas {
> @@ -260,6 +280,25 @@ &cdsp_pas {
>  	status = "okay";
>  };
>  
> +&dsi0 {
> +	status = "okay";
> +	vdda-supply = <&vreg_l26a_1p2>;
> +
> +	ports {
> +		port@1 {
> +			endpoint {
> +				remote-endpoint = <&sn65dsi86_in_a>;
> +				data-lanes = <0 1 2 3>;
> +			};
> +		};
> +	};
> +};
> +
> +&dsi0_phy {
> +	status = "okay";
> +	vdds-supply = <&vreg_l1a_0p875>;
> +};
> +
>  &gcc {
>  	protected-clocks = <GCC_QSPI_CORE_CLK>,
>  			   <GCC_QSPI_CORE_CLK_SRC>,
> @@ -328,6 +367,45 @@ tsc1: hid@10 {
>  	};
>  };
>  
> +&i2c10 {
> +	status = "okay";
> +	clock-frequency = <400000>;
> +
> +	sn65dsi86: bridge@2c {
> +		compatible = "ti,sn65dsi86";
> +		reg = <0x2c>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&sn65dsi86_pin_active>;
> +
> +		enable-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
> +
> +		vpll-supply = <&vreg_l14a_1p88>;
> +		vccio-supply = <&vreg_l14a_1p88>;
> +
> +		clocks = <&sn65dsi86_refclk>;
> +		clock-names = "refclk";
> +
> +		ports {
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +
> +			port@0 {
> +				reg = <0>;
> +				sn65dsi86_in_a: endpoint {
> +					remote-endpoint = <&dsi0_out>;
> +				};
> +			};
> +
> +			port@1 {
> +				reg = <1>;
> +				sn65dsi86_out: endpoint {
> +					remote-endpoint = <&panel_in_edp>;
> +				};
> +			};
> +		};
> +	};
> +};
> +
>  &i2c11 {
>  	status = "okay";
>  	clock-frequency = <400000>;
> @@ -344,10 +422,26 @@ ecsh: hid@5c {
>  	};
>  };
>  
> +&mdss {
> +	status = "okay";
> +};
> +
> +&mdss_mdp {
> +	status = "okay";
> +};
> +
>  &mss_pil {
>  	firmware-name = "qcom/LENOVO/81JL/qcdsp1v2850.mbn", "qcom/LENOVO/81JL/qcdsp2850.mbn";
>  };
>  
> +&qup_i2c10_default {
> +	pinconf {
> +		pins = "gpio55", "gpio56";
> +		drive-strength = <2>;
> +		bias-disable;
> +	};
> +};
> +
>  &qup_i2c12_default {
>  	drive-strength = <2>;
>  	bias-disable;
> @@ -454,6 +548,12 @@ codec {
>  &tlmm {
>  	gpio-reserved-ranges = <0 4>, <81 4>;
>  
> +	sn65dsi86_pin_active: sn65dsi86-enable {
> +		pins = "gpio96";
> +		drive-strength = <2>;
> +		bias-disable;
> +	};
> +
>  	i2c3_hid_active: i2c2-hid-active {
>  		pins = "gpio37";
>  		function = "gpio";

Tested-by: Steev Klimaszewski <steev@kali.org>