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Wed, 04 Mar 2026 22:13:53 -0800 (PST) X-Received: by 2002:a17:902:ea08:b0:2ae:44db:56ed with SMTP id d9443c01a7336-2ae6aa20d76mr46975515ad.15.1772691233086; Wed, 04 Mar 2026 22:13:53 -0800 (PST) Received: from [10.217.217.147] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2ae5e1699c9sm68679885ad.10.2026.03.04.22.13.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 04 Mar 2026 22:13:52 -0800 (PST) Message-ID: <38302cbf-d832-49de-8e8e-06ca3dd1ce6f@oss.qualcomm.com> Date: Thu, 5 Mar 2026 11:43:47 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 5/5] clk: qcom: dispcc[01]-sa8775p: Fix DSI byte clock rate setting To: Konrad Dybcio , Bjorn Andersson , Michael Turquette , Stephen Boyd , Dmitry Baryshkov , Luca Weiss , Dmitry Baryshkov , Ajit Pandey , Taniya Das , Jagadeesh Kona Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio References: <20260304-topic-dsi_byte_fixup-v1-0-b79b29f83176@oss.qualcomm.com> <20260304-topic-dsi_byte_fixup-v1-5-b79b29f83176@oss.qualcomm.com> Content-Language: en-US From: Taniya Das In-Reply-To: <20260304-topic-dsi_byte_fixup-v1-5-b79b29f83176@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Authority-Analysis: v=2.4 cv=I5Johdgg c=1 sm=1 tr=0 ts=69a91f22 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=0TM1Jmez4aZXe2oQUkEA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-ORIG-GUID: pcqnsI1dZKgpotKtslQzFMTzKt6_gMdh X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzA1MDA0NiBTYWx0ZWRfX1vLUEJ4coTWw ap6/6uzZkJEtLn/Fg1R/u6M8ork8jODS/fmi2YQvolmMJ465Q0/6BDvvixkBAYvklM2wuZF0ICT oX55bSXFXiqKfoWW1fC6TY6ihF+KNdNiPyuejr9ywi3iwZ75f/QqU0eXHNUsTS+5tuceJG7sC+K bNyjyXXR2M6NeUP8TNZlfn1znShT7EmQiQ5qyFlaSmlsgSa01oOt+RFkfSMgb9NIGigd+NIWjS0 o13wMd0yxS5A+hYVqTE/o9pkmDcU/f+N5CQKBqrMPrJRMSq5cjHVygDAraL252ozrbTKJKTGeJH b6G+nQUO2fjlYH4TFSo0c6pgXLsr8JnyAsNwU8hYsrIbMJWnfRGr1ci1tOfYhHWfHqbJxmZ+1ow Uowd5K6zQFb2dg1fI40Ffh2MRp0TQM37DUSBTykiy0mpmpNiy/+K+m42tV7SQONyuQ/4CpbOqbG o0P9qLZXZNrQ3hKDG5g== X-Proofpoint-GUID: pcqnsI1dZKgpotKtslQzFMTzKt6_gMdh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-05_01,2026-03-04_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 priorityscore=1501 bulkscore=0 malwarescore=0 suspectscore=0 adultscore=0 clxscore=1015 impostorscore=0 spamscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2602130000 definitions=main-2603050046 On 3/4/2026 7:18 PM, Konrad Dybcio wrote: > The clock tree for byte_clk_src is as follows: > > ┌──────byte0_clk_src─────┐ > │ │ > byte0_clk byte0_div_clk_src > │ > byte0_intf_clk > > If both of its direct children have CLK_SET_RATE_PARENT with different > requests, byte0_clk_src (and its parent) will be reconfigured. In this > case, byte0_intf should strictly follow the rate of byte0_clk (with > some adjustments based on PHY mode). > > Remove CLK_SET_RATE_PARENT from byte0_div_clk_src to avoid this issue. > > Fixes: e700bfd2f976 ("clk: qcom: Add support for Display clock Controllers on SA8775P") > Signed-off-by: Konrad Dybcio > --- > drivers/clk/qcom/dispcc0-sa8775p.c | 2 -- > drivers/clk/qcom/dispcc1-sa8775p.c | 2 -- > 2 files changed, 4 deletions(-) Reviewed-by: Taniya Das -- Thanks, Taniya Das