From: Richard Cochran <richardcochran@gmail.com>
To: <netdev@vger.kernel.org>
Cc: linux-kernel@vger.kernel.org, "Amir Vadai" <amirv@mellanox.com>,
"Ariel Elior" <ariel.elior@qlogic.com>,
"Arnd Bergmann" <arnd@linaro.org>,
"Baolin Wang" <baolin.wang@linaro.org>,
"Ben Hutchings" <ben@decadent.org.uk>,
"Bruce Allan" <bruce.w.allan@intel.com>,
"Carolyn Wyborny" <carolyn.wyborny@intel.com>,
"Chris Metcalf" <cmetcalf@ezchip.com>,
"David Miller" <davem@davemloft.net>,
"Frank Li" <Frank.Li@freescale.com>,
"Giuseppe Cavallaro" <peppe.cavallaro@st.com>,
"Jacob Keller" <jacob.e.keller@intel.com>,
"Jeff Kirsher" <jeffrey.t.kirsher@intel.com>,
"John Stultz" <john.stultz@linaro.org>,
"Luwei Zhou" <b45643@freescale.com>,
"Matthew Vick" <matthew.vick@intel.com>,
"Michael Chan" <mchan@broadcom.com>,
"Prashant Sreedharan" <prashant@broadcom.com>,
"Rayagond K" <rayagond@vayavyalabs.com>,
"Shradha Shah" <sshah@solarflare.com>,
"Solarflare linux maintainers" <linux-net-drivers@solarflare.com>,
"Sonic Zhang" <sonic.zhang@analog.com>,
"Stefan Sørensen" <stefan.sorensen@spectralink.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Tom Lendacky" <thomas.lendacky@amd.com>
Subject: [PATCH net-next V3 12/23] ptp: i40e: convert to the 64 bit get/set time methods.
Date: Sun, 29 Mar 2015 23:12:02 +0200 [thread overview]
Message-ID: <383fdda547e5bf606d2d379e511aaace5f062fec.1427662907.git.richardcochran@gmail.com> (raw)
In-Reply-To: <cover.1427662906.git.richardcochran@gmail.com>
The device appears to use a 64 bit nanoseconds register, and so with
this patch the driver should be ready for the year 2038.
Compile tested only.
Signed-off-by: Richard Cochran <richardcochran@gmail.com>
Acked-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
---
drivers/net/ethernet/intel/i40e/i40e_ptp.c | 26 +++++++++++++-------------
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/net/ethernet/intel/i40e/i40e_ptp.c b/drivers/net/ethernet/intel/i40e/i40e_ptp.c
index fabcfa1..a92b772 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_ptp.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_ptp.c
@@ -57,7 +57,7 @@
* timespec. However, since the registers are 64 bits of nanoseconds, we must
* convert the result to a timespec before we can return.
**/
-static void i40e_ptp_read(struct i40e_pf *pf, struct timespec *ts)
+static void i40e_ptp_read(struct i40e_pf *pf, struct timespec64 *ts)
{
struct i40e_hw *hw = &pf->hw;
u32 hi, lo;
@@ -69,7 +69,7 @@ static void i40e_ptp_read(struct i40e_pf *pf, struct timespec *ts)
ns = (((u64)hi) << 32) | lo;
- *ts = ns_to_timespec(ns);
+ *ts = ns_to_timespec64(ns);
}
/**
@@ -81,10 +81,10 @@ static void i40e_ptp_read(struct i40e_pf *pf, struct timespec *ts)
* we receive a timespec from the stack, we must convert that timespec into
* nanoseconds before programming the registers.
**/
-static void i40e_ptp_write(struct i40e_pf *pf, const struct timespec *ts)
+static void i40e_ptp_write(struct i40e_pf *pf, const struct timespec64 *ts)
{
struct i40e_hw *hw = &pf->hw;
- u64 ns = timespec_to_ns(ts);
+ u64 ns = timespec64_to_ns(ts);
/* The timer will not update until the high register is written, so
* write the low register first.
@@ -159,14 +159,14 @@ static int i40e_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
static int i40e_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
{
struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
- struct timespec now, then = ns_to_timespec(delta);
+ struct timespec64 now, then = ns_to_timespec64(delta);
unsigned long flags;
spin_lock_irqsave(&pf->tmreg_lock, flags);
i40e_ptp_read(pf, &now);
- now = timespec_add(now, then);
- i40e_ptp_write(pf, (const struct timespec *)&now);
+ now = timespec64_add(now, then);
+ i40e_ptp_write(pf, (const struct timespec64 *)&now);
spin_unlock_irqrestore(&pf->tmreg_lock, flags);
@@ -181,7 +181,7 @@ static int i40e_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
* Read the device clock and return the correct value on ns, after converting it
* into a timespec struct.
**/
-static int i40e_ptp_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
+static int i40e_ptp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
{
struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
unsigned long flags;
@@ -202,7 +202,7 @@ static int i40e_ptp_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
* to ns happens in the write function.
**/
static int i40e_ptp_settime(struct ptp_clock_info *ptp,
- const struct timespec *ts)
+ const struct timespec64 *ts)
{
struct i40e_pf *pf = container_of(ptp, struct i40e_pf, ptp_caps);
unsigned long flags;
@@ -613,8 +613,8 @@ static long i40e_ptp_create_clock(struct i40e_pf *pf)
pf->ptp_caps.pps = 0;
pf->ptp_caps.adjfreq = i40e_ptp_adjfreq;
pf->ptp_caps.adjtime = i40e_ptp_adjtime;
- pf->ptp_caps.gettime = i40e_ptp_gettime;
- pf->ptp_caps.settime = i40e_ptp_settime;
+ pf->ptp_caps.gettime64 = i40e_ptp_gettime;
+ pf->ptp_caps.settime64 = i40e_ptp_settime;
pf->ptp_caps.enable = i40e_ptp_feature_enable;
/* Attempt to register the clock before enabling the hardware. */
@@ -673,7 +673,7 @@ void i40e_ptp_init(struct i40e_pf *pf)
dev_err(&pf->pdev->dev, "%s: ptp_clock_register failed\n",
__func__);
} else {
- struct timespec ts;
+ struct timespec64 ts;
u32 regval;
dev_info(&pf->pdev->dev, "%s: added PHC on %s\n", __func__,
@@ -695,7 +695,7 @@ void i40e_ptp_init(struct i40e_pf *pf)
i40e_ptp_set_timestamp_mode(pf, &pf->tstamp_config);
/* Set the clock value. */
- ts = ktime_to_timespec(ktime_get_real());
+ ts = ktime_to_timespec64(ktime_get_real());
i40e_ptp_settime(&pf->ptp_caps, &ts);
}
}
--
1.7.10.4
next prev parent reply other threads:[~2015-03-29 21:17 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-29 21:11 [PATCH net-next V3 00/23] ptp: get ready for 2038 Richard Cochran
2015-03-29 21:11 ` [PATCH net-next V3 01/23] ptp: introduce get/set time methods with explicit 64 bit seconds Richard Cochran
2015-03-29 21:11 ` [PATCH net-next V3 02/23] ptp: use the 64 bit gettime method for the SYS_OFFSET ioctl Richard Cochran
2015-03-29 21:11 ` [PATCH net-next V3 03/23] ptp: use the 64 bit get/set time methods for the posix clock Richard Cochran
2015-03-29 21:11 ` [PATCH net-next V3 04/23] ptp: blackfin: convert to the 64 bit get/set time methods Richard Cochran
2015-03-29 21:11 ` [PATCH net-next V3 05/23] ptp: xgbe: " Richard Cochran
2015-03-29 21:11 ` [PATCH net-next V3 06/23] ptp: bnx2x: " Richard Cochran
2015-03-30 21:13 ` Sony Chacko
2015-03-29 21:11 ` [PATCH net-next V3 07/23] ptp: tg3: " Richard Cochran
2015-03-29 21:11 ` [PATCH net-next V3 08/23] ptp: fec: " Richard Cochran
2015-03-29 21:11 ` [PATCH net-next V3 09/23] ptp: gianfar: " Richard Cochran
2015-03-29 21:12 ` [PATCH net-next V3 10/23] ptp: e1000e: " Richard Cochran
2015-03-31 21:48 ` Richard Cochran
2015-03-31 23:26 ` David Miller
2015-03-29 21:12 ` [PATCH net-next V3 11/23] ptp: fm10k: " Richard Cochran
2015-03-29 21:12 ` Richard Cochran [this message]
2015-03-29 21:12 ` [PATCH net-next V3 13/23] ptp: igb: " Richard Cochran
2015-03-31 21:08 ` Keller, Jacob E
2015-03-31 21:37 ` Richard Cochran
2015-04-02 0:08 ` Keller, Jacob E
2015-03-31 21:53 ` Richard Cochran
2015-04-02 0:06 ` Keller, Jacob E
2015-04-02 6:33 ` Richard Cochran
2015-03-29 21:12 ` [PATCH net-next V3 14/23] ptp: ixgbe: " Richard Cochran
2015-03-29 21:12 ` [PATCH net-next V3 15/23] ptp: mlx4: " Richard Cochran
2015-03-29 21:12 ` [PATCH net-next V3 16/23] ptp: sfc: " Richard Cochran
2015-03-29 21:12 ` [PATCH net-next V3 17/23] ptp: stmmac: " Richard Cochran
2015-03-29 21:12 ` [PATCH net-next V3 18/23] ptp: cpts: " Richard Cochran
2015-03-29 21:12 ` [PATCH net-next V3 19/23] ptp: tilegx: " Richard Cochran
2015-03-29 21:32 ` Chris Metcalf
2015-03-29 21:12 ` [PATCH net-next V3 20/23] ptp: dp83640: " Richard Cochran
2015-03-29 21:12 ` [PATCH net-next V3 21/23] ptp: ixp46x: " Richard Cochran
2015-03-29 21:12 ` [PATCH net-next V3 22/23] ptp: pch: " Richard Cochran
2015-03-29 21:12 ` [PATCH net-next V3 23/23] ptp: remove 32 bit get/set methods Richard Cochran
2015-03-31 16:01 ` [PATCH net-next V3 00/23] ptp: get ready for 2038 David Miller
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=383fdda547e5bf606d2d379e511aaace5f062fec.1427662907.git.richardcochran@gmail.com \
--to=richardcochran@gmail.com \
--cc=Frank.Li@freescale.com \
--cc=amirv@mellanox.com \
--cc=ariel.elior@qlogic.com \
--cc=arnd@linaro.org \
--cc=b45643@freescale.com \
--cc=baolin.wang@linaro.org \
--cc=ben@decadent.org.uk \
--cc=bruce.w.allan@intel.com \
--cc=carolyn.wyborny@intel.com \
--cc=cmetcalf@ezchip.com \
--cc=davem@davemloft.net \
--cc=jacob.e.keller@intel.com \
--cc=jeffrey.t.kirsher@intel.com \
--cc=john.stultz@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-net-drivers@solarflare.com \
--cc=matthew.vick@intel.com \
--cc=mchan@broadcom.com \
--cc=netdev@vger.kernel.org \
--cc=peppe.cavallaro@st.com \
--cc=prashant@broadcom.com \
--cc=rayagond@vayavyalabs.com \
--cc=sonic.zhang@analog.com \
--cc=sshah@solarflare.com \
--cc=stefan.sorensen@spectralink.com \
--cc=tglx@linutronix.de \
--cc=thomas.lendacky@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®