Re: [PATCH 0/5] Blackfin SMP like patchset

["Bryan Wu" <cooloney@kernel.org>]

On Wed, Nov 19, 2008 at 2:56 PM, Andrew Morton
<akpm@linux-foundation.org> wrote:
> On Tue, 18 Nov 2008 17:05:03 +0800 Bryan Wu <cooloney@kernel.org> wrote:
>
>>
>> Hi folks,
>>
>> We provide the SMP like functions for our Blackfin dual core processor
>> BF561 for almost 1 year. And after a long time developing, debugging and
>> internal review, we'd like to post them to LKML for other maintainer
>> review.
>>
>> Please find our wiki page about this SMP like patches:
>> http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:smp-like
>
> Would prefer that changelogs be self-contained, please.  Kernel
> changelogs are for ever, and I doubt if that page will be there in 20
> years time.
>

I guess Graf started this wiki recently although the patch exists for
a long time.
And Graf gave a presentation about this SMP on BF561 in AKA 2008 Linux kernel
developer conference. If I found the link of this presentation, I will
post it again.

> Particularly when that page must be read to learn fundamental things such as
>
>  The SMP support in certain Blackfin processors is describe as `SMP
>  Like' rather than just `SMP' due to the lack of hardware cache
>  coherency.  A true SMP system would have support for cache coherency
>  in hardware.
>
>  On all `SMP Like' setups, cache coherency is maintained via
>  software mechanisms
>
> Interesting!
>

Exactly, SMP means hardware cache coherency. But BF561 dual core
processor was designed almost 8 years ago.
we have to do some workaround in software side. Fortunately, BF561
provides a L2 memory shared by both CoreA and CoreB.
We did some trick in this L2 memory and our Scratchpad memory.

'SMP Like' is software aided SMP solution on Blackfin dual core BF561 processor.
Please enjoy -:)

-Bryan