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Mon, 18 Nov 2024 11:07:17 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4AIB7GOQ029920 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 18 Nov 2024 11:07:16 GMT Received: from [10.218.15.248] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 18 Nov 2024 03:07:11 -0800 Message-ID: <386f0f4a-b17e-4f0b-90ef-0a960f23b1e4@quicinc.com> Date: Mon, 18 Nov 2024 16:37:07 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V4 1/3] dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P To: Dmitry Baryshkov CC: Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Sibi Sankar , , , , , Odelu Kukatla , Mike Tipton References: <20241112075826.28296-1-quic_rlaggysh@quicinc.com> <20241112075826.28296-2-quic_rlaggysh@quicinc.com> Content-Language: en-US From: Raviteja Laggyshetty In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: PqHpfkL2JIzPyYmidHAZqME6-UvA2m08 X-Proofpoint-GUID: PqHpfkL2JIzPyYmidHAZqME6-UvA2m08 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 mlxlogscore=999 phishscore=0 spamscore=0 impostorscore=0 adultscore=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 mlxscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411180092 On 11/12/2024 7:20 PM, Dmitry Baryshkov wrote: > On Tue, Nov 12, 2024 at 07:58:24AM +0000, Raviteja Laggyshetty wrote: >> Add Epoch Subsystem (EPSS) L3 interconnect provider binding on >> SA8775P SoCs. >> >> Signed-off-by: Raviteja Laggyshetty >> --- >> Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml >> index 21dae0b92819..94f7f283787a 100644 >> --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml >> +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml >> @@ -33,6 +33,7 @@ properties: >> - qcom,sm6375-cpucp-l3 >> - qcom,sm8250-epss-l3 >> - qcom,sm8350-epss-l3 >> + - qcom,sa8775p-epss-l3 >> - const: qcom,epss-l3 > > No, sa8775p isn't compatible with qcom,epss-l3. I asked you to split the > driver patch, not to change the compatibles. > > Got it, I will split the driver code changes into two patches. First patch will contain the SoC-specific compatible change and multi device support. Second patch will contain the generic compatible addition to of_match table.