new 16k page size for a PPC

[Ralph Blach <rcblach@raleigh.ibm.com>]

I am trying to port Linux to an embedded power pc.  I need to use a 16k
page size 
because this processor uses a virtually indexed real tagged instruction
cache.  With a
4k page size this results in instruction synonyms.  If I were to stay
with 4k pages,
then each time I want to invalidate the instruction cache, the synonyms
would have to  be invalidated.
This would require a search of the TLB to verify that the synonym
address was mapped in the TLB.
Execution of an ICBI on a non mapped instruction would result in a
tranlsation error.

With a 16k page size there are no synonyms and therefore there will not
be a TLB search for the
synonym.

I have made the following changes in pgtable.h

#define PMD_SHIFT       24 
#define PGDIR_SHIFT     24

If you have any suggestions please make it to this forum.

Thanks

Chip

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