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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b5cba06b7f6sm465031066b.30.2025.10.16.01.09.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 16 Oct 2025 01:10:01 -0700 (PDT) Message-ID: <38c3bf97-4b69-4450-9e23-32ece07e38dc@oss.qualcomm.com> Date: Thu, 16 Oct 2025 10:09:58 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] dt-bindings: iommu: qcom_iommu: Allow 'tbu' clock To: Dmitry Baryshkov , Robin Murphy Cc: Konrad Dybcio , Joerg Roedel , Will Deacon , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio References: <20251015-topic-qciommu_bindings_fix-v2-1-a0f3c705d0f3@oss.qualcomm.com> <8e7a145e-6871-4974-ae19-40699747803b@arm.com> <56fcl2ip6ecu4inig7ecpjt7qrsdt6sehkrzrk6joysbp6tea7@4xdgxhhe3aso> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <56fcl2ip6ecu4inig7ecpjt7qrsdt6sehkrzrk6joysbp6tea7@4xdgxhhe3aso> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: lt6au6b0bExRjMBBKASI2ZNqD8lichez X-Authority-Analysis: v=2.4 cv=MrNfKmae c=1 sm=1 tr=0 ts=68f0a85b cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=bEtsd_hQwJtcpMEHxR8A:9 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: lt6au6b0bExRjMBBKASI2ZNqD8lichez X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDExMDAxOCBTYWx0ZWRfX6L7NF0HXSBjy oLqUF+Axe3dm6UpSS/LaIpajjc1RhAM+jRUZQ+FqvayTA5GjjdtIaisLQkzynihOWbR9X1zvrH4 dO7nJLUZx/+BOVwMnkYb7yReXqonnl6M+KDq9Sqdh1CzdCtG3MEeRbu9h78/tKaNOtMX2i/yNOy 3mYhPorTJODPwsOFbSwAr6b1Ap1ZbSJvkm2lBIXE24BX4VoOVuP53SJgvEbho/lSOdE7b5Vz4Hw 5QTWCeNy3dqorKK1kA/Cx0bdk3Kkm9m4C/UoXuHPTAtfATyiFi3Tu/G237aem+ZIjw5aRMGmf3e cI3ggunzkoL2AqB7PZ/iGEZoBnOH8blH8efSZhv9PdtLTgfWAUchqRAXgFG8tJNo9dpUeykobE7 9CHWE/xhawZItQm0LyX7uarD9hsDqQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-16_01,2025-10-13_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 clxscore=1015 adultscore=0 phishscore=0 impostorscore=0 priorityscore=1501 malwarescore=0 lowpriorityscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510110018 On 10/15/25 10:10 PM, Dmitry Baryshkov wrote: > On Wed, Oct 15, 2025 at 05:48:05PM +0100, Robin Murphy wrote: >> On 2025-10-15 5:41 pm, Konrad Dybcio wrote: >>> From: Konrad Dybcio >>> >>> Some IOMMUs on some platforms (there doesn't seem to be a good denominator > > It would be nice to provide some examples here. > >>> for this) require the presence of a third clock, specifically for >>> accessing the IOMMU's Translation Buffer Unit (TBU). Allow it. >> >> Hmmm, but isn't the only thing that accesses TBUs the consumer of the >> qcom,tbu binding, which already has its own clock? > > qcom,tbu is only defined for normal arm,mmu-500 platforms. Here Konrad > is fixing the older and more obscure Qualcomm virtual MMU device. (for context: this touches upon 2014-ish platforms) I checked the address map of the physical MMU500 that lies underneath this virtual impl and it doesn't fully expose the same registers that the modern ones do, I only see PWR_STATUS. The BSP kernels for those oldies don't seem to have a notion of a TBU either, except for toggling clocks that contain "_TBU" in their name at both the IOMMU device and some DMA-capable multimedia blocks, which I suppose makes some sense.. Konrad