From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 59B47304976 for ; Fri, 19 Dec 2025 10:24:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766139892; cv=none; b=kgGbomCwRmC66xR9QZdErYv4VwKebZpushqtJXaMuCM65gkCjw0Uiz6n8KmspYBgLuc4RYcEv6A5QscRQ9A6l48bMXfO2V4xob0LzKGPWC/r9+Lr2am3zMBDamUul6qj22BhhL4D6ORCvYC8FyRFQqXooJ8JBBFXR0xORKGC/wE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766139892; c=relaxed/simple; bh=IZDfJuSWX0sND3KPNUOZxwyDQnPFNpPkGPkiKl174iQ=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=GAhKlvmkIKLaZKrt7pegbxa5UUGxc5O6J0ZZfwKwsJuQnjR0FiANwA4h91GF+BEpZcKmKCZ6R9JhzmHhiNjJc5lJIolnEltr7kitVIsxjgkfdIc0W7H6GotsHyB4qbuNwgUZFdh52v83ceV2pQJlzJwlQ3LGYELQQ2OCc/QeSoY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 99D86FEC; Fri, 19 Dec 2025 02:24:43 -0800 (PST) Received: from [10.1.197.1] (ewhatever.cambridge.arm.com [10.1.197.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 937393F5CA; Fri, 19 Dec 2025 02:24:49 -0800 (PST) Message-ID: <38dc6948-6233-4b0a-a769-538939abe345@arm.com> Date: Fri, 19 Dec 2025 10:24:48 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 2/3] coresight: tpda: add logic to configure TPDA_SYNCR register To: Jie Gan , Mike Leach , James Clark , Alexander Shishkin , Tingwei Zhang Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tao Zhang References: <20251219-add_sysfs_nodes_to_configure_tpda-v5-0-ca93ddfe9d30@oss.qualcomm.com> <20251219-add_sysfs_nodes_to_configure_tpda-v5-2-ca93ddfe9d30@oss.qualcomm.com> Content-Language: en-US From: Suzuki K Poulose In-Reply-To: <20251219-add_sysfs_nodes_to_configure_tpda-v5-2-ca93ddfe9d30@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 19/12/2025 10:04, Jie Gan wrote: > From: Tao Zhang > > The TPDA_SYNC counter tracks the number of bytes transferred from the > aggregator. When this count reaches the value programmed in the > TPDA_SYNCR register, an ASYNC request is triggered, allowing userspace > tools to accurately parse each valid packet. > > Signed-off-by: Tao Zhang > Reviewed-by: James Clark > Co-developed-by: Jie Gan > Signed-off-by: Jie Gan > --- > drivers/hwtracing/coresight/coresight-tpda.c | 7 +++++++ > drivers/hwtracing/coresight/coresight-tpda.h | 5 +++++ > 2 files changed, 12 insertions(+) > > diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c > index d25a8bcfb3d4..d378ff8ad77d 100644 > --- a/drivers/hwtracing/coresight/coresight-tpda.c > +++ b/drivers/hwtracing/coresight/coresight-tpda.c > @@ -163,6 +163,13 @@ static void tpda_enable_pre_port(struct tpda_drvdata *drvdata) > */ > if (drvdata->trig_flag_ts) > writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR); > + > + val = readl_relaxed(drvdata->base + TPDA_SYNCR); > + /* Reset the mode ctrl */ > + val &= ~TPDA_SYNCR_MODE_CTRL; > + /* Program the counter value for TPDA_SYNCR */ > + val |= TPDA_SYNCR_COUNTER_MASK; Do we plan to change this value via sysfs ? If not whats the point of clearing the field. Why not simply set it (as it is all 1s anyways). > + writel_relaxed(val, drvdata->base + TPDA_SYNCR); > } > > static int tpda_enable_port(struct tpda_drvdata *drvdata, int port) > diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h > index 8a075cfbc3cc..97e2729c15c9 100644 > --- a/drivers/hwtracing/coresight/coresight-tpda.h > +++ b/drivers/hwtracing/coresight/coresight-tpda.h > @@ -9,6 +9,7 @@ > #define TPDA_CR (0x000) > #define TPDA_Pn_CR(n) (0x004 + (n * 4)) > #define TPDA_FPID_CR (0x084) > +#define TPDA_SYNCR (0x08C) > > /* Cross trigger Global (all ports) flush request bit */ > #define TPDA_CR_FLREQ BIT(0) > @@ -38,6 +39,10 @@ > #define TPDA_Pn_CR_CMBSIZE GENMASK(7, 6) > /* Aggregator port DSB data set element size bit */ > #define TPDA_Pn_CR_DSBSIZE BIT(8) Newline to separate the defintions of different registers, please. > +/* TPDA_SYNCR mode control bit */ > +#define TPDA_SYNCR_MODE_CTRL BIT(12) > +/* TPDA_SYNCR counter mask */ > +#define TPDA_SYNCR_COUNTER_MASK GENMASK(11, 0) > > #define TPDA_MAX_INPORTS 32 > Suzuki >