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Peter Anvin" , platform-driver-x86@vger.kernel.org, LKML , song@kernel.org Subject: Re: [PATCH] [v2] platform/x86/amd/hsmp: move hsmp_msg_desc_table[] to hsmp.c In-Reply-To: Message-ID: <39140d31-7cf3-fca0-ad84-1cb033b045c7@linux.intel.com> References: <20241030210019.2858358-1-arnd@kernel.org> <582e3574-1823-0c1b-25a8-6a4a6bf73f63@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323328-1493538551-1731406777=:961" This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323328-1493538551-1731406777=:961 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: QUOTED-PRINTABLE On Mon, 4 Nov 2024, Suma Hegde wrote: > Hi, >=20 >=20 > On 10/31/2024 3:22 PM, Ilpo J=C3=A4rvinen wrote: > > Caution: This message originated from an External Source. Use proper ca= ution > > when opening attachments, clicking links, or responding. > >=20 > >=20 > > On Wed, 30 Oct 2024, Arnd Bergmann wrote: > >=20 > > > From: Arnd Bergmann > > >=20 > > > After the file got split, there are now W=3D1 warnings for users that > > > include it without referencing hsmp_msg_desc_table: > > >=20 > > > In file included from arch/x86/include/asm/amd_hsmp.h:6, > > > from drivers/platform/x86/amd/hsmp/plat.c:12: > > > arch/x86/include/uapi/asm/amd_hsmp.h:91:35: error: 'hsmp_msg_desc_tab= le' > > > defined but not used [-Werror=3Dunused-const-variable=3D] > > > 91 | static const struct hsmp_msg_desc hsmp_msg_desc_table[] =3D = { > > > | ^~~~~~~~~~~~~~~~~~~ > > >=20 > > > The array was never meant to be used by userspace code, but was > > > left in the header as a reference for userspace programmers. > > >=20 > > > Move the contents of the array into the one file that actually needs > > > it, and instead leave the URL of the new location in the uapi header > > > in case anyone is looking for it. > > >=20 > > > Fixes: e47c018a0ee6 ("platform/x86/amd/hsmp: Move platform device spe= cific > > > code to plat.c") > > > Suggested-by: Hans de Goede > > > Link: > > > https://lore.kernel.org/lkml/046687d8-1e2d-435b-adcb-26897bfd29f7@red= hat.com/ > > > Signed-off-by: Arnd Bergmann > > Reviewed-by: Ilpo J=C3=A4rvinen > >=20 > > I'll leave it into patchwork for a few days if somebody has some still > > unvoiced opinions on this. > AFAIK, Song Liu might be having some user space tool which makes use of t= his > hsmp_msg_desc_table[]. >=20 > Please refer > https://lore.kernel.org/platform-driver-x86/bfee54fe-1779-fea2-8365-31167= cc06972@amd.com/T/#mb563e1e07183e6bb5f85ab2cba4afe0deca1d3c3 >=20 > for the discussions on having this table in UAPI header. >=20 > @Song Liu, this table is moved to hsmp.c now.=C2=A0 Please raise your con= cern here > if any. Given what that thread says about tests, I've decided to take careful=20 approach of v1 instead of v2. I'd still appreciate if Song Liu could confirm if this is relevant for=20 some tests or not. We can proceed with the move to .c file later if it=20 turns out unused. --=20 i. > > > arch/x86/include/uapi/asm/amd_hsmp.h | 255 ++----------------------= --- > > > drivers/platform/x86/amd/hsmp/hsmp.c | 245 ++++++++++++++++++++++++= + > > > 2 files changed, 255 insertions(+), 245 deletions(-) > > >=20 > > > diff --git a/arch/x86/include/uapi/asm/amd_hsmp.h > > > b/arch/x86/include/uapi/asm/amd_hsmp.h > > > index e5d182c7373c..dfa6aa985ac4 100644 > > > --- a/arch/x86/include/uapi/asm/amd_hsmp.h > > > +++ b/arch/x86/include/uapi/asm/amd_hsmp.h > > > @@ -1,5 +1,15 @@ > > > /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ > > >=20 > > > +/* > > > + * See hsmp_msg_desc_table[] in: > > > + * > > > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tr= ee/drivers/platform/x86/amd/hsmp.c > > > + * > > > + * for some information on number of input- and output arguments > > > + * for the various functions. > > > + * > > > + * Please find the supported list of messages and message definition > > > + * in the HSMP chapter of respective family/model PPR. > > > + */ > > > #ifndef _UAPI_ASM_X86_AMD_HSMP_H_ > > > #define _UAPI_ASM_X86_AMD_HSMP_H_ > > >=20 > > > @@ -81,251 +91,6 @@ struct hsmp_msg_desc { > > > enum hsmp_msg_type type; > > > }; > > >=20 > > > -/* > > > - * User may use these comments as reference, please find the > > > - * supported list of messages and message definition in the > > > - * HSMP chapter of respective family/model PPR. > > > - * > > > - * Not supported messages would return -ENOMSG. > > > - */ > > > -static const struct hsmp_msg_desc hsmp_msg_desc_table[] =3D { > > > - /* RESERVED */ > > > - {0, 0, HSMP_RSVD}, > > > - > > > - /* > > > - * HSMP_TEST, num_args =3D 1, response_sz =3D 1 > > > - * input: args[0] =3D xx > > > - * output: args[0] =3D xx + 1 > > > - */ > > > - {1, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_SMU_VER, num_args =3D 0, response_sz =3D 1 > > > - * output: args[0] =3D smu fw ver > > > - */ > > > - {0, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_PROTO_VER, num_args =3D 0, response_sz =3D 1 > > > - * output: args[0] =3D proto version > > > - */ > > > - {0, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_SOCKET_POWER, num_args =3D 0, response_sz =3D 1 > > > - * output: args[0] =3D socket power in mWatts > > > - */ > > > - {0, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_SET_SOCKET_POWER_LIMIT, num_args =3D 1, response_sz =3D= 0 > > > - * input: args[0] =3D power limit value in mWatts > > > - */ > > > - {1, 0, HSMP_SET}, > > > - > > > - /* > > > - * HSMP_GET_SOCKET_POWER_LIMIT, num_args =3D 0, response_sz =3D= 1 > > > - * output: args[0] =3D socket power limit value in mWatts > > > - */ > > > - {0, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_SOCKET_POWER_LIMIT_MAX, num_args =3D 0, response_sz= =3D 1 > > > - * output: args[0] =3D maximuam socket power limit in mWatts > > > - */ > > > - {0, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_SET_BOOST_LIMIT, num_args =3D 1, response_sz =3D 0 > > > - * input: args[0] =3D apic id[31:16] + boost limit value in MHz= [15:0] > > > - */ > > > - {1, 0, HSMP_SET}, > > > - > > > - /* > > > - * HSMP_SET_BOOST_LIMIT_SOCKET, num_args =3D 1, response_sz =3D= 0 > > > - * input: args[0] =3D boost limit value in MHz > > > - */ > > > - {1, 0, HSMP_SET}, > > > - > > > - /* > > > - * HSMP_GET_BOOST_LIMIT, num_args =3D 1, response_sz =3D 1 > > > - * input: args[0] =3D apic id > > > - * output: args[0] =3D boost limit value in MHz > > > - */ > > > - {1, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_PROC_HOT, num_args =3D 0, response_sz =3D 1 > > > - * output: args[0] =3D proc hot status > > > - */ > > > - {0, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_SET_XGMI_LINK_WIDTH, num_args =3D 1, response_sz =3D 0 > > > - * input: args[0] =3D min link width[15:8] + max link width[7:0= ] > > > - */ > > > - {1, 0, HSMP_SET}, > > > - > > > - /* > > > - * HSMP_SET_DF_PSTATE, num_args =3D 1, response_sz =3D 0 > > > - * input: args[0] =3D df pstate[7:0] > > > - */ > > > - {1, 0, HSMP_SET}, > > > - > > > - /* HSMP_SET_AUTO_DF_PSTATE, num_args =3D 0, response_sz =3D 0 *= / > > > - {0, 0, HSMP_SET}, > > > - > > > - /* > > > - * HSMP_GET_FCLK_MCLK, num_args =3D 0, response_sz =3D 2 > > > - * output: args[0] =3D fclk in MHz, args[1] =3D mclk in MHz > > > - */ > > > - {0, 2, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_CCLK_THROTTLE_LIMIT, num_args =3D 0, response_sz = =3D 1 > > > - * output: args[0] =3D core clock in MHz > > > - */ > > > - {0, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_C0_PERCENT, num_args =3D 0, response_sz =3D 1 > > > - * output: args[0] =3D average c0 residency > > > - */ > > > - {0, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_SET_NBIO_DPM_LEVEL, num_args =3D 1, response_sz =3D 0 > > > - * input: args[0] =3D nbioid[23:16] + max dpm level[15:8] + min= dpm > > > level[7:0] > > > - */ > > > - {1, 0, HSMP_SET}, > > > - > > > - /* > > > - * HSMP_GET_NBIO_DPM_LEVEL, num_args =3D 1, response_sz =3D 1 > > > - * input: args[0] =3D nbioid[23:16] > > > - * output: args[0] =3D max dpm level[15:8] + min dpm level[7:0] > > > - */ > > > - {1, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_DDR_BANDWIDTH, num_args =3D 0, response_sz =3D 1 > > > - * output: args[0] =3D max bw in Gbps[31:20] + utilised bw in > > > Gbps[19:8] + > > > - * bw in percentage[7:0] > > > - */ > > > - {0, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_TEMP_MONITOR, num_args =3D 0, response_sz =3D 1 > > > - * output: args[0] =3D temperature in degree celsius. [15:8] in= teger > > > part + > > > - * [7:5] fractional part > > > - */ > > > - {0, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_DIMM_TEMP_RANGE, num_args =3D 1, response_sz =3D 1 > > > - * input: args[0] =3D DIMM address[7:0] > > > - * output: args[0] =3D refresh rate[3] + temperature range[2:0] > > > - */ > > > - {1, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_DIMM_POWER, num_args =3D 1, response_sz =3D 1 > > > - * input: args[0] =3D DIMM address[7:0] > > > - * output: args[0] =3D DIMM power in mW[31:17] + update rate in > > > ms[16:8] + > > > - * DIMM address[7:0] > > > - */ > > > - {1, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_DIMM_THERMAL, num_args =3D 1, response_sz =3D 1 > > > - * input: args[0] =3D DIMM address[7:0] > > > - * output: args[0] =3D temperature in degree celsius[31:21] + u= pdate > > > rate in ms[16:8] + > > > - * DIMM address[7:0] > > > - */ > > > - {1, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_SOCKET_FREQ_LIMIT, num_args =3D 0, response_sz =3D = 1 > > > - * output: args[0] =3D frequency in MHz[31:16] + frequency > > > source[15:0] > > > - */ > > > - {0, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_CCLK_CORE_LIMIT, num_args =3D 1, response_sz =3D 1 > > > - * input: args[0] =3D apic id [31:0] > > > - * output: args[0] =3D frequency in MHz[31:0] > > > - */ > > > - {1, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_RAILS_SVI, num_args =3D 0, response_sz =3D 1 > > > - * output: args[0] =3D power in mW[31:0] > > > - */ > > > - {0, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_SOCKET_FMAX_FMIN, num_args =3D 0, response_sz =3D 1 > > > - * output: args[0] =3D fmax in MHz[31:16] + fmin in MHz[15:0] > > > - */ > > > - {0, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_IOLINK_BANDWITH, num_args =3D 1, response_sz =3D 1 > > > - * input: args[0] =3D link id[15:8] + bw type[2:0] > > > - * output: args[0] =3D io bandwidth in Mbps[31:0] > > > - */ > > > - {1, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_XGMI_BANDWITH, num_args =3D 1, response_sz =3D 1 > > > - * input: args[0] =3D link id[15:8] + bw type[2:0] > > > - * output: args[0] =3D xgmi bandwidth in Mbps[31:0] > > > - */ > > > - {1, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_SET_GMI3_WIDTH, num_args =3D 1, response_sz =3D 0 > > > - * input: args[0] =3D min link width[15:8] + max link width[7:0= ] > > > - */ > > > - {1, 0, HSMP_SET}, > > > - > > > - /* > > > - * HSMP_SET_PCI_RATE, num_args =3D 1, response_sz =3D 1 > > > - * input: args[0] =3D link rate control value > > > - * output: args[0] =3D previous link rate control value > > > - */ > > > - {1, 1, HSMP_SET}, > > > - > > > - /* > > > - * HSMP_SET_POWER_MODE, num_args =3D 1, response_sz =3D 0 > > > - * input: args[0] =3D power efficiency mode[2:0] > > > - */ > > > - {1, 0, HSMP_SET}, > > > - > > > - /* > > > - * HSMP_SET_PSTATE_MAX_MIN, num_args =3D 1, response_sz =3D 0 > > > - * input: args[0] =3D min df pstate[15:8] + max df pstate[7:0] > > > - */ > > > - {1, 0, HSMP_SET}, > > > - > > > - /* > > > - * HSMP_GET_METRIC_TABLE_VER, num_args =3D 0, response_sz =3D 1 > > > - * output: args[0] =3D metrics table version > > > - */ > > > - {0, 1, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_METRIC_TABLE, num_args =3D 0, response_sz =3D 0 > > > - */ > > > - {0, 0, HSMP_GET}, > > > - > > > - /* > > > - * HSMP_GET_METRIC_TABLE_DRAM_ADDR, num_args =3D 0, response_sz= =3D 2 > > > - * output: args[0] =3D lower 32 bits of the address > > > - * output: args[1] =3D upper 32 bits of the address > > > - */ > > > - {0, 2, HSMP_GET}, > > > -}; > > > - > > > /* Metrics table (supported only with proto version 6) */ > > > struct hsmp_metric_table { > > > __u32 accumulation_counter; > > > diff --git a/drivers/platform/x86/amd/hsmp/hsmp.c > > > b/drivers/platform/x86/amd/hsmp/hsmp.c > > > index 82d8ba2e1204..5d21bc8b2fd7 100644 > > > --- a/drivers/platform/x86/amd/hsmp/hsmp.c > > > +++ b/drivers/platform/x86/amd/hsmp/hsmp.c > > > @@ -37,6 +37,251 @@ > > >=20 > > > static struct hsmp_plat_device hsmp_pdev; > > >=20 > > > +/* > > > + * User may use these comments as reference, please find the > > > + * supported list of messages and message definition in the > > > + * HSMP chapter of respective family/model PPR. > > > + * > > > + * Not supported messages would return -ENOMSG. > > > + */ > > > +static const struct hsmp_msg_desc hsmp_msg_desc_table[] =3D { > > > + /* RESERVED */ > > > + {0, 0, HSMP_RSVD}, > > > + > > > + /* > > > + * HSMP_TEST, num_args =3D 1, response_sz =3D 1 > > > + * input: args[0] =3D xx > > > + * output: args[0] =3D xx + 1 > > > + */ > > > + {1, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_SMU_VER, num_args =3D 0, response_sz =3D 1 > > > + * output: args[0] =3D smu fw ver > > > + */ > > > + {0, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_PROTO_VER, num_args =3D 0, response_sz =3D 1 > > > + * output: args[0] =3D proto version > > > + */ > > > + {0, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_SOCKET_POWER, num_args =3D 0, response_sz =3D 1 > > > + * output: args[0] =3D socket power in mWatts > > > + */ > > > + {0, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_SET_SOCKET_POWER_LIMIT, num_args =3D 1, response_sz =3D= 0 > > > + * input: args[0] =3D power limit value in mWatts > > > + */ > > > + {1, 0, HSMP_SET}, > > > + > > > + /* > > > + * HSMP_GET_SOCKET_POWER_LIMIT, num_args =3D 0, response_sz =3D= 1 > > > + * output: args[0] =3D socket power limit value in mWatts > > > + */ > > > + {0, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_SOCKET_POWER_LIMIT_MAX, num_args =3D 0, response_sz= =3D 1 > > > + * output: args[0] =3D maximuam socket power limit in mWatts > > > + */ > > > + {0, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_SET_BOOST_LIMIT, num_args =3D 1, response_sz =3D 0 > > > + * input: args[0] =3D apic id[31:16] + boost limit value in MHz= [15:0] > > > + */ > > > + {1, 0, HSMP_SET}, > > > + > > > + /* > > > + * HSMP_SET_BOOST_LIMIT_SOCKET, num_args =3D 1, response_sz =3D= 0 > > > + * input: args[0] =3D boost limit value in MHz > > > + */ > > > + {1, 0, HSMP_SET}, > > > + > > > + /* > > > + * HSMP_GET_BOOST_LIMIT, num_args =3D 1, response_sz =3D 1 > > > + * input: args[0] =3D apic id > > > + * output: args[0] =3D boost limit value in MHz > > > + */ > > > + {1, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_PROC_HOT, num_args =3D 0, response_sz =3D 1 > > > + * output: args[0] =3D proc hot status > > > + */ > > > + {0, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_SET_XGMI_LINK_WIDTH, num_args =3D 1, response_sz =3D 0 > > > + * input: args[0] =3D min link width[15:8] + max link width[7:0= ] > > > + */ > > > + {1, 0, HSMP_SET}, > > > + > > > + /* > > > + * HSMP_SET_DF_PSTATE, num_args =3D 1, response_sz =3D 0 > > > + * input: args[0] =3D df pstate[7:0] > > > + */ > > > + {1, 0, HSMP_SET}, > > > + > > > + /* HSMP_SET_AUTO_DF_PSTATE, num_args =3D 0, response_sz =3D 0 *= / > > > + {0, 0, HSMP_SET}, > > > + > > > + /* > > > + * HSMP_GET_FCLK_MCLK, num_args =3D 0, response_sz =3D 2 > > > + * output: args[0] =3D fclk in MHz, args[1] =3D mclk in MHz > > > + */ > > > + {0, 2, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_CCLK_THROTTLE_LIMIT, num_args =3D 0, response_sz = =3D 1 > > > + * output: args[0] =3D core clock in MHz > > > + */ > > > + {0, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_C0_PERCENT, num_args =3D 0, response_sz =3D 1 > > > + * output: args[0] =3D average c0 residency > > > + */ > > > + {0, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_SET_NBIO_DPM_LEVEL, num_args =3D 1, response_sz =3D 0 > > > + * input: args[0] =3D nbioid[23:16] + max dpm level[15:8] + min= dpm > > > level[7:0] > > > + */ > > > + {1, 0, HSMP_SET}, > > > + > > > + /* > > > + * HSMP_GET_NBIO_DPM_LEVEL, num_args =3D 1, response_sz =3D 1 > > > + * input: args[0] =3D nbioid[23:16] > > > + * output: args[0] =3D max dpm level[15:8] + min dpm level[7:0] > > > + */ > > > + {1, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_DDR_BANDWIDTH, num_args =3D 0, response_sz =3D 1 > > > + * output: args[0] =3D max bw in Gbps[31:20] + utilised bw in > > > Gbps[19:8] + > > > + * bw in percentage[7:0] > > > + */ > > > + {0, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_TEMP_MONITOR, num_args =3D 0, response_sz =3D 1 > > > + * output: args[0] =3D temperature in degree celsius. [15:8] in= teger > > > part + > > > + * [7:5] fractional part > > > + */ > > > + {0, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_DIMM_TEMP_RANGE, num_args =3D 1, response_sz =3D 1 > > > + * input: args[0] =3D DIMM address[7:0] > > > + * output: args[0] =3D refresh rate[3] + temperature range[2:0] > > > + */ > > > + {1, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_DIMM_POWER, num_args =3D 1, response_sz =3D 1 > > > + * input: args[0] =3D DIMM address[7:0] > > > + * output: args[0] =3D DIMM power in mW[31:17] + update rate in > > > ms[16:8] + > > > + * DIMM address[7:0] > > > + */ > > > + {1, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_DIMM_THERMAL, num_args =3D 1, response_sz =3D 1 > > > + * input: args[0] =3D DIMM address[7:0] > > > + * output: args[0] =3D temperature in degree celsius[31:21] + u= pdate > > > rate in ms[16:8] + > > > + * DIMM address[7:0] > > > + */ > > > + {1, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_SOCKET_FREQ_LIMIT, num_args =3D 0, response_sz =3D = 1 > > > + * output: args[0] =3D frequency in MHz[31:16] + frequency > > > source[15:0] > > > + */ > > > + {0, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_CCLK_CORE_LIMIT, num_args =3D 1, response_sz =3D 1 > > > + * input: args[0] =3D apic id [31:0] > > > + * output: args[0] =3D frequency in MHz[31:0] > > > + */ > > > + {1, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_RAILS_SVI, num_args =3D 0, response_sz =3D 1 > > > + * output: args[0] =3D power in mW[31:0] > > > + */ > > > + {0, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_SOCKET_FMAX_FMIN, num_args =3D 0, response_sz =3D 1 > > > + * output: args[0] =3D fmax in MHz[31:16] + fmin in MHz[15:0] > > > + */ > > > + {0, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_IOLINK_BANDWITH, num_args =3D 1, response_sz =3D 1 > > > + * input: args[0] =3D link id[15:8] + bw type[2:0] > > > + * output: args[0] =3D io bandwidth in Mbps[31:0] > > > + */ > > > + {1, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_XGMI_BANDWITH, num_args =3D 1, response_sz =3D 1 > > > + * input: args[0] =3D link id[15:8] + bw type[2:0] > > > + * output: args[0] =3D xgmi bandwidth in Mbps[31:0] > > > + */ > > > + {1, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_SET_GMI3_WIDTH, num_args =3D 1, response_sz =3D 0 > > > + * input: args[0] =3D min link width[15:8] + max link width[7:0= ] > > > + */ > > > + {1, 0, HSMP_SET}, > > > + > > > + /* > > > + * HSMP_SET_PCI_RATE, num_args =3D 1, response_sz =3D 1 > > > + * input: args[0] =3D link rate control value > > > + * output: args[0] =3D previous link rate control value > > > + */ > > > + {1, 1, HSMP_SET}, > > > + > > > + /* > > > + * HSMP_SET_POWER_MODE, num_args =3D 1, response_sz =3D 0 > > > + * input: args[0] =3D power efficiency mode[2:0] > > > + */ > > > + {1, 0, HSMP_SET}, > > > + > > > + /* > > > + * HSMP_SET_PSTATE_MAX_MIN, num_args =3D 1, response_sz =3D 0 > > > + * input: args[0] =3D min df pstate[15:8] + max df pstate[7:0] > > > + */ > > > + {1, 0, HSMP_SET}, > > > + > > > + /* > > > + * HSMP_GET_METRIC_TABLE_VER, num_args =3D 0, response_sz =3D 1 > > > + * output: args[0] =3D metrics table version > > > + */ > > > + {0, 1, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_METRIC_TABLE, num_args =3D 0, response_sz =3D 0 > > > + */ > > > + {0, 0, HSMP_GET}, > > > + > > > + /* > > > + * HSMP_GET_METRIC_TABLE_DRAM_ADDR, num_args =3D 0, response_sz= =3D 2 > > > + * output: args[0] =3D lower 32 bits of the address > > > + * output: args[1] =3D upper 32 bits of the address > > > + */ > > > + {0, 2, HSMP_GET}, > > > +}; > > > + > > > /* > > > * Send a message to the HSMP port via PCI-e config space registers > > > * or by writing to MMIO space. >=20 > Thanks and Regards, >=20 > Suma >=20 --8323328-1493538551-1731406777=:961--